DG2018 Datasheet, PDF (7/8 Pages) Vishay Siliconix – Low Voltage, Dual DPDT and Quad SPDT Analog Switches

TEST CIRCUITS
New Product
DG2018/2019
Vishay Siliconix
Switch
Input
Logic
Input
V+
V+
NO or NC
COM
IN
GND
0V
Switch Output
V_OUT
R_L
300 W
C_L
35 pF
Logic
Input
Switch
Output
C_L (includes fixture and stray capacitance)
ǒ Ǔ V_OUT + V_COM
R_L
R_L ) R_ON
FIGURE 1. Switching Time
V_INH
V_INL
50%
t_r t 5 ns
t_f t 5 ns
0.9 x V_OUT
0V
t_ON
t_OFF
Logic “1” = Switch On
Logic input waveforms inverted for switches that have
the opposite logic sense.
V+
V+
NO
V_NO
COM
NC
V_NC
IN
GND
R_L
50 W
V_O
C_L
35 pF
Logic
Input
V_INH
V_INL
V_NC = V_NO
V_O
Switch _{0 V}
Output
C_L (includes fixture and stray capacitance)
FIGURE 3. Break-Before-Make Interval
90%
t_D
t_r <5 ns
t_f <5 ns
t_D
V+
V_gen
R_gen
+
V_IN = 0 − V+
V+
NC or NO
IN
GND
Document Number: 72342
S-31644—Rev. A, 01-Aug-03
COM
V_OUT
V_OUT
DV_OUT
C_L = 1 nF
IN
On
Off
On
Q = DV_OUT x C_L
FIGURE 2. Charge Injection
IN depends on switch configuration: input polarity
determined by sense of switch.
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