DG2017_11 Datasheet, PDF (7/11 Pages) Vishay Siliconix – Low-Voltage, Low RON, Dual DPDT Analog Switch

TEST CIRCUITS
DG2017
Vishay Siliconix
V+
V_gen
R_gen
+
V_IN = 0 - V+
COM
V+
NC or NO
IN
GND
V_OUT
V_OUT
V_OUT
C_L = 1 nF
IN
On
Off
On
Q = V_OUT x C_L
IN depends on switch configuration: input polarity
determined by sense of switch.
Figure 3. Charge Injection
V+
10 nF
V+
NC or NO
IN
COM _COM
R_L
GND
Analyzer
V_COM
Off Isolation = 20 log _{VNO/ NC}
Figure 4. Off-Isolation
0V, 2.4 V
V+
10 nF
V+
COM
IN
0 V, 2.4 V
NC or NO
GND
Meter
HP4192A
Impedance
Analyzer
or Equivalent
f = 1 MHz
Figure 5. Channel Off/On Capacitance
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?72228.
Document Number: 72228
www.vishay.com
S11-1185-Rev. B, 13-Jun-11
7
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000