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SIC403A Datasheet, PDF (6/24 Pages) Vishay Siliconix – 6 A microBUCK® SiC403A/B Integrated Buck Regulator with Programmable LDO
SiC403A, SiC403BCD
Vishay Siliconix
ELECTRICAL SPECIFICATIONS
Parameter
ILIM Comparator Offset Voltage
Output Under-Voltage Fault
Smart Power-Save Protection
Threshold Voltage (b)
Over-Voltage Protection Threshold
Over-Voltage Fault Delay (b)
Over Temperature Shutdown (b)
Logic Inputs/Outputs
Logic Input High Voltage
Logic Input Low Volatge
EN/PSV Input for P-Save Operation (b)
EN/PSV Input for Forced Continuous
Operation (b)
Symbol
VILM-LK
VOUV_Fault
PSave_VTH
tOV-Delay
TShut
VIH
VIL
Test Conditions Unless Specified
VIN = 12 V, VDD = 5 V, TA = + 25 °C for typ.,
- 40 °C to + 85 °C for min. and max.,
TJ = < 125 °C, typical application circuit
With respect to AGND
VFB with respect to Internal 600 mV
reference, 8 consecutive clocks
VFB with respect to internal 600 mV
VFB with respect to internal 600 mV
10 °C hysteresis
Min. Typ. Max. Unit
- 10 0 + 10 mV
- 25
+ 10
%
+ 20
5
µs
150
°C
VDD = 5 V
1
0.4
2.2
5
V
1
2
EN/PSV Input for Disabling Switcher
0
0.4
EN/PSV Input Bias Current
IEN
EN/PSV = VDD or GND
- 10
+ 10
ENL Input Bias Current
IENL
ENL = VIN = 28 V
11 18 µA
FBL, FB Input Bias Current
FBL_ILK
FBL, FB = VDD or GND
-1
+1
Linear Dropout Regulator
FBL (b)
VLDO ACC
0.75
V
Short-circuit protection,
VIN = 12 V, VDD < 0.75 V
65
LDO Current Limit
LDO_ILIM
Start-up and foldback, VIN = 12 V,
0.75 < VDD < 90 % of final VDD value
115
mA
VLDO to VOUT Switch-over Threshold (d)
VLDO to VOUT Non-switch-over Threshold (d)
VLDO-BPS
VLDO-NBPS
Operating current limit, VIN = 12 V,
VDD > 90 % of final VDD value
135 200
- 130
- 500
+ 130
mV
+ 500
VLDO to VOUT Switch-over Resistance
RLDO
VOUT = 5 V
2

LDO Drop Out Voltage (e)
From VIN to VDD,
VDD = + 5 V, IVLDO = 100 mA
1.2
V
Notes:
a. VIN UVLO is programmable using a resistor divider from VIN to ENL to AGND. The ENL voltage is compared to an internal reference.
b. Typical value measured on standard evaluation board.
c. SiC403A/B has first order temperature compensation for over current. Results vary based upon the PCB thermal layout
d. The switch-over threshold is the maximum voltage differential between the VLDO and VOUT pins which ensures that VLDO will internally
switch-over to VOUT. The non-switch-over threshold is the minimum voltage diff erential between the VLDO and VOUT pins which ensures that
VLDO will not switch-over to VOUT.
e. The LDO drop out voltage is the voltage at which the LDO output drops 2 % below the nominal regulation point.
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For technical questions, contact: powerictechsupport@vishay.com
Document Number: 62768
6
S12-1972-Rev. A, 27-Aug-12
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000