IRF510 Datasheet, PDF (6/8 Pages) Supertex, Inc – N-Channel Enhancement-Mode Vertical DMOS Power FETs

IRF510, SiHF510
Vishay Siliconix
300
I_D
Top 2.3 A
250
4.0 A
Bottom 5.6 A
200
150
100
50
V_DD = 25 V
0
25
50
75
100 125 150 175
91015_12c
Starting T_J, Junction Temperature (°C)
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
10 V
Q_GS
V_G
Q_G
Q_GD
Charge
Fig. 13a - Basic Gate Charge Waveform
Current regulator
Same type as D.U.T.
12 V
50 kΩ
0.2 µF
0.3 µF
+
D.U.T. - ^VDS
V_GS
3 mA
I_G
I_D
Current sampling resistors
Fig. 13b - Gate Charge Test Circuit
www.vishay.com
6
Document Number: 91015
S-81377-Rev. A, 30-Jun-08