GS7660 Datasheet, PDF (6/9 Pages) Vishay Siliconix – Switched-Capacitor Voltage Converter

GS7660
Vishay
formerly General Semiconductor
f
VIN
V_OUT
C1
C2
R_LOAD
Fig. 8 – Switched Capacitor Model
To better understand the theory of operation, a review of
the basic switched capacitor building block is helpful (see
Fig. 8). Referring to Fig. 8 and looking at one full cycle of
operation, the charge being drained by the load is Qavg or
IL x T (T being the time period of one full cycle).
All the charge (∆q) flowing into the output is being delivered
by the input to C1 during only half the cycle. Under steady-
state condition, C1 will charge to the level of the input voltage
(VIN) and discharge to the peak level of the output voltage
(VOUT). Therefor the voltage change on C1 is VIN – VOUT.
Qavg = ∆q = C1(Vin –Vout)
IL x T = C1(Vin –Vout) or IL = f x C1(Vin –Vout) f = 1/T
IL
=
(Vin
–Vout)
1
and
REQUIV =
1
f x C1
(See fig. 9)
f x C1
Where f is one-half the oscillator frequency. This resistance
is a major component of the output resistance of switched
capacitor circuits.
With C1 = C2 = 10µF and Fosc = 10kHz, this resistance
represents 20Ω.
Under the same conditions, the typical value in the
“Electrical Characteristics” section of the GS7660 is 35Ω.
Design Information
Low Voltage (LV) Pin
Fig. 10 (below) shows a simplified circuit diagram of the
GS7660.
It shows a voltage regulator between the VIN and Gnd, in
series with the Oscillator.
Grounding the LV pin removes the regulator from this
series path and improves low voltage performance down to
1.5V. For supply voltages less than 3.0V, the LV pin should
be connected to ground and left open for voltages above
3.0V.
The LV pin can be left grounded over the total range of
Input Voltages. This will improve low voltage operation and
increase oscillator frequency. The disadvantage is
increased quiescent current and reduced efficiency at
higher voltages.
1M
BOOST
pin 1
OSC
pin 7
Q
÷2 _Q
LV
pin 6
VIN
pin 8
S1
CAP+
pin 2
S2
S3
S4
V_OUT
pin 5
GND
CAP-
pin 3
pin 4
Fig. 10 – Functional Diagram
R_EQUIV
VIN
R_EQUIV =
1
f × C1
C2
V_OUT
R_LOAD
Fig. 9 – Equivalent Impedance
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Document Number 74819
24-May-02