DG441B Datasheet, PDF (6/7 Pages) Vishay Siliconix – Improved Quad SPST CMOS Analog Switches

DG441B/442B
Vishay Siliconix
New Product
TEST CIRCUITS
10 V
3V
+15 V
V+
S
D
IN
GND
R_L
1
V− kW
−15 V
V_O
C_L
35 pF
Logic
3V
Input
0V
50% 50%
t_r <20 ns
t_f <20 ns
Switch _VS
Input
V_O
80%
t_OFF
80%
Switch 0 V
Output
t_ON
C_L (includes fixture and stray capacitance)
Note:
Logic input waveform is inverted for DG442.
+15 V
V+
R_g
S
D
IN
3V
GND
V−
−15 V
FIGURE 2. Switching Time
V_O
C_L
1 nF
FIGURE 3. Charge Injection
V_O
IN_{X OFF}
(DG441B)
OFF
IN_X
(DG442B)
DV
O
ON
OFF
ON
Q = DV_O x C_L
OFF
+15 V
C = 1 mF tantalum in parallel with 0.01 mF ceramic
C
+15 V
C
V+
V_S
S₁
D₁
R_g = 50 W
IN₁
0V, 2.4 V
NC
S₂
D₂
50 W
V_O
V_S
V+
S
D
V_O
R_g = 50 W
IN
R_L
0V, 2.4 V
0V, 2.4 V
IN₂
R_L
GND
V−
C
GND
V− C
−15 V
−15 V
X_TALK Isolation = 20 log
C = RF bypass
V_S
V_O
FIGURE 4. Crosstalk
+15 V
C
Off Isolation = 20 log ^VS
V_O
FIGURE 5. Off Isolation
V+
S
IN
0 V, 2.4 V
GND
D
V−
C
Meter
HP4192A
Impedance
Analyzer
or Equivalent
www.vishay.com
6
−15 V
FIGURE 6. Source/Drain Capacitances
Document Number: 72625
S-32553—Rev. A, 15-Dec-03