SIP41104 Datasheet, PDF (5/8 Pages) Vishay Siliconix – Half-Bridge N-Channel MOSFET Driver for DC/DC Conversion

FUNCTIONAL BLOCK DIAGRAM
V_DD
UVLO
OTP
PWM
GND
TRI STATE
DETECT
SiP41104
Vishay Siliconix
-
+
V_BBM
V_DD
BOOT
OUT_H
LX
OUT_L
Figure 1.
DETAILED OPERATION
PWM
The PWM pin controls the switching of the external
MOSFETs. The driver logic operates in a noninverting
configuration. The PWM input stage should be driven by a
signal with fast transition times, like those provided by a
PWM controller or logic gate, (< 200 ns). The PWM input
functions as a logic input and is not intended for applications
where a slow changing input voltage is used to generate a
switching output when the input switching threshold voltage
is reached.
Low-Side Driver
The supplies for the low-side driver are V_DD and GND.
During shutdown, OUT_L is held low.
High-Side Driver
The high-side driver is isolated from the substrate to create a
floating high-side driver so that an N-Channel MOSFET can
be used for the high-side switch. The supplies for the high-
side driver are BOOT and LX. The voltage is supplied by a
floating bootstrap capacitor, which is continually recharged
by the switching action of the output. During shutdown OUT_H
is held low.
Bootstrap Circuit
The internal bootstrap diode and a bootstrap capacitor form
a charge pump that supplies voltage to the BOOT pin. An
integrated bootstrap diode replaces the external Schottky
diode needed for the bootstrap circuit; only a capacitor is
necessary to complete the bootstrap circuit. The bootstrap
capacitor is sized according to,
C_BOOT = (Q_GATE/ΔV_{BOOT - LX}) x 10
where Q_GATE is the gate charge needed to turn on the high-
side MOSFET and ΔV_{BOOT - LX} is the amount of droop
allowed in the bootstrapped supply voltage when the high-
side MOSFET is driven high. The bootstrap capacitor value
is typically 0.1 µF to 1µF. The bootstrap capacitor voltage
rating must be greater than V_DD + 5 V to withstand transient
spikes and ringing.
Shoot-Through Protection
The external MOSFETs are prevented from conducting at
the same time during transitions. Break-before-make circuits
monitor the voltages on the LX pin and the OUT_L pin and
control the switching as follows: When the signal on PWM
goes low, OUT_H will go low after an internal propagation
delay. After the voltage on LX falls below 1 V by the inductor
action, the low-side driver is enabled and OUT_L goes high
after some delay. When the signal on PWM goes high, OUT_L
will go low after an internal propagation delay. After the
voltage on OUT_L drops below 1 V the high-side driver is
enabled and OUT_H will go high after an internal propagation
delay. If LX does not drop below 1 V within 400 ns after
OUT_H goes low, OUT_L is forced high until the next PWM
transition.
Document Number: 72706
S09-1454-Rev. E, 03-Aug-09
www.vishay.com
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