PDS-500 Datasheet, PDF (4/9 Pages) Vishay Siliconix – Graphic Plasma Display Controller

PDS-500/-1
Vishay Dale
SERIAL INTERFACE
J3, SERIAL INTERFACE CONNECTOR. Optional serial interface, mates with AMP 10-pin IDC type 746288-1 or equivalent.
The baud rate is jumper selected by jumper block W1 for 9600 or 19.2K baud.
SERIAL INTERFACE PIN CONNECTIONS.
DISPLAY CONNECTOR J3 AND HOST CONNECTION
PIN
DESCRIPTION
DB-9
1
n/c (reserved)
2
n/c (reserved)
3
TxD (output)
2
4
CTS (input)
7
5
RxD (input)
3
6
RTS (output)
8
7
n/c (reserved)
8
n/c (reserved)
9
GND
5
10
n/c (reserved)
DB-25
3
4
2
5
7
DESCRIPTION
RxD
RTS
TxD
CTS
GND
W1 JUMPER (CONFIGURATION)
Shunt pairs of pins on jumper W1 to select display format,
serial interface baud rate, parallel interface operation, or
self-test functions.
128 x 32
APD-128G032/A
128 x 64
APD-128G064/D
192 x 64
APD-192G064/-x
256 x 64
APD-256G064/A/-x
320 x 64
APD-320G064/-x
19.2K
19,200 baud serial communications
PARALLEL
8-bit parallel interface communications
SELF TEST
Self Test, graphic mode
At least 1 jumper must be placed to select display pixel format.
Default communications is serial 9600 baud, unless 19.2K
or PARALLEL is jumpered.
Jumpering both SELF TEST and PARALLEL will run a self
demo configured for the 128 x 64 display.
Note: Display must be reset (power-up condition) to activate
jumper selection.
W2 JUMPER (DOT CLOCK)
The following dot clock settings are recommended for the
various display formats:
DISPLAY SIZE
JUMPER SETTING SCAN RATE
128 x 32
500 (250)kHz
122 (61)Hz
128 x 64
1MHz (500KHz)
122 (61)Hz
192 x 64
1MHz
81Hz
256 x 64
2MHz (1MHz)
122Hz (61Hz)
320 x 64
2MHz
97Hz
The scan rate may affect the dim brightness level, there
should be little or no affect on the bright level.
DISPLAY INTERFACE
J4, DISPLAY INTERFACE CONNECTOR. Mates with AMP
14-pin IDC type 746285-2 or equivalent. Connects directly
to VISHAY DALE display models APD-128G032/A, APD-
128G064/D, APD-192G064/-x, APD-256G064/-x, and APD-
320G064/-x.
DISPLAY INTERFACE PIN CONNECTIONS
PIN NUMBER
DESCRIPTION
1
display enable
2
GND
3
row data (VSYNC)
4
GND
5
row clock (HSYNC)
6
GND
7
column latch (HSYNC)
8
GND
9
dot clock
10
GND
11
dot data
12
GND
13
no connection (reserved)
14
GND
For an explanation of these signals, refer to the appropri-
ate display data sheet.
www.vishay.com
4
Document Number: 37074
Revision 14-Mar-02