VS-50RIA Datasheet, PDF (3/8 Pages) Vishay Siliconix – Medium Power Phase Control Thyristors (Stud Version), 50 A

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VS-50RIA Series
Vishay Semiconductors
TRIGGERING
PARAMETER
SYMBOL
TEST CONDITIONS
Maximum peak gate power
Maximum average gate power
Maximum peak positive gate current
Maximum peak positive gate voltage
Maximum peak negative gate voltage
DC gate current required to trigger
DC gate voltage required to trigger
DC gate current not to trigger
DC gate voltage not to trigger
P_GM
P_G(AV)
I_GM
+V_GM
-V_GM
I_GT
V_GT
I_GD
V_GD
T_J = T_J maximum, t_p  5 ms
T_J = - 40 °C
T_J = 25 °C
T_J = 125 °C
T_J = - 40 °C
T_J = 25 °C
T_J = T_J maximum,
V_DRM = Rated voltage
T_J = T_J maximum
Maximum required gate trigger
current/voltage are the lowest 
value which will trigger all units 6 V
anode to cathode applied
Maximum gate current/voltage
not to trigger is the maximum
value which will not trigger any
unit with rated V_DRM anode to
cathode applied
VALUES
10
2.5
2.5
20
10
250
100
50
3.5
2.5
5.0
0.2
UNITS
W
A
V
mA
V
mA
V
THERMAL AND MECHANICAL SPECIFICATIONS
PARAMETER
SYMBOL
TEST CONDITIONS
Maximum operating junction and
storage temperature range
T_J, T_Stg
Maximum thermal resistance, 
junction to case
R_thJC
DC operation
Maximum thermal resistance, 
case to heat sink
R_thCS Mounting surface, smooth, flat and greased
Allowable mounting torque
Non-lubricated threads
Lubricated threads
Approximate weight
Case style
See dimensions - link at the end of datasheet
VALUES
-40 to +125
UNITS
°C
0.35
K/W
0.25
3.4 ^{+ 0 - 10 %}
(30)
2.3 ^{+ 0 - 10 %}
(20)
N·m
(lbf · in)
28
g
1.0
oz.
TO-208AC (TO-65)
R_thJC CONDUCTION
CONDUCTION ANGLE
SINUSOIDAL CONDUCTION
RECTANGULAR CONDUCTION
TEST CONDITIONS UNITS
180°
0.078
0.057
120°
0.094
0.098
90°
0.120
60°
0.176
0.130
0.183
T_J = T_J maximum
K/W
30°
0.294
0.296
Note
• The table above shows the increment of thermal resistance R_thJC when devices operate at different conduction angles than DC

Revision: 19-Nov-15
3
Document Number: 93711
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