SI9102_07 Datasheet, PDF (3/10 Pages) Vishay Siliconix – 3-W High-Voltage Switchmode Regulator

Si9102
Vishay Siliconix
SPECIFICATIONS^a
Parameter
Error Amplifier
Symbol
Test Conditions
Unless Otherwise Specified
DISCHARGE = - V_IN = 0 V
V_CC = 10 V, + V_IN = 48 V
R_BIAS = 390 kΩ, R_OSC = 330 kΩ
Limits
D Suffix - 40 to 85 °C
Temp^b Min^d Typ^c Max^d Unit
Feedback Input Voltage
Input BIAS Current
Open Loop Voltage Gain^e
Unity Gain Bandwidth^e
Dynamic Output Impedance^e
Output Current
Input OFFSET Voltage
Output Current
Power Supply Rejection
Current Limit
Threshold Voltage
Delay to Output^e
Pre-Regulator/Start-Up
Input Voltage
Input Leakage Current
Pre-Regulator Start-Up Current
V_CC Pre-Regulator Turn-Off
Threshold Voltage
Undervoltage Lockout
V_FB
I_FB
A_VOL
BW
Z_OUT
I_OUT
V_OS
I_OUT
PSRR
V_SOURCE
t_d
+ V_IN
+ I_IN
I_START
V_REG
V_UVLO
FB Tied to COMP
OSC IN = - V_IN (OSC Disabled)
OSC IN = - V_IN, V_FB = 4 V,
OSC IN = - V_IN (OSC Disabled)
Source (V_FB = 3.4 V)
OSC IN = - V_IN (OSC Disabled)
Sink (V_FB = 4.5 V)
9.5 V ≤ V_CC ≤ 13.5 V
R_L = 100 Ω from DRAIN to V_CC
V_FB = 0 V
R_L = 100 Ω from DRAIN to V_CC
V_SOURCE = 1.5 V, See Figure 1
I_IN = 10 µA
V_CC ≥ 10 V
Pulse Width ≤ 300 µs, V_CC = 7 V
I_{PRE-REGULATOR} = 10 µA
R_L = 100 Ω from DRAIN to V_CC
See Detailed Description
Room 3.96 4.00 4.04
V
Room
25
500
nA
Room 60
80
dB
Room 0.7
1
MHz
Room
1000 2000
Ω
Room
- 2.0 - 1.4
mA
Room
± 15 ± 40
mV
Room 0.12 0.15
mA
Room 50
70
dB
Room 1.0
1.2
1.4
V
Room
100
200
ns
Room
Room
Room
8
120
V
10
µA
15
mA
Room 7.8
9.4
9.7
Room 7.0
8.8
9.2
V
V_REG, - V_UVLO
V_DELTA
Room 0.3
0.6
Supply
Supply Current
I_CC
Room 0.45
0.6
1.0
mA
Bias Current
I_BIAS
Room 10
15
20
µA
Logic
SHUTDOWN Delay^e
SHUTDOWN Pulse Width^e
RESET Pulse Width^e
Latching Pulse Width^e
SHUTDOWN and RESET Low
t_SD
V_SOURCE = - V_IN, See Figure 2
Room
50
100
t_SW
Room 50
t_RW
See Figure 3
Room 50
ns
t_LW
Room 25
Input Low Voltage
V_IL
Input High Voltage
V_IH
Input Current Input Voltage High
I_IH
Input Current Input Voltage Low
I_IL
V_IN = 10 V
V_IN = 0 V
Room
Room 8.0
2.0
V
Room
1
5
µA
Room - 35
- 25
MOSFET Switch
Breakdown Voltage
Drain-Source On Resistance^f
V_BR(DSS)
r_DS(on)
I_DRAIN = 100 µA
I_DRAIN = 100 mA
Full
200
220
V
Room
7
Ω
Drain Off Leakage Current
I_DSS
V_DRAIN = 100 V
Room
5
10
µA
Drain Capacitance
C_DS
Room
35
pF
Notes:
a. Refer to PROCESS OPTION FLOWCHART for additional information.
b. Room = 25 °C, Full = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not subject to production test.
f. Temperature coefficient of r_DS(on) is 0.75 % per °C, typical.
g. C_STRAY Pin 8 = ≤ 5 pF.
Document Number: 70001
S-70497-Rev. H, 19-Mar-07
www.vishay.com
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