DG4051A_10 Datasheet, PDF (3/16 Pages) Vishay Siliconix – 8-Channel, Dual 4-Channel, Triple 2-Channel (Triple SPDT) Multiplexers

DG4051A, DG4052A, DG4053A
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS T_A = 25 °C, unless otherwise noted
Parameter
Limit
Unit
V+ to V-
14
GND to V-
Digital Inputs^a, V_S, V_D
7
V
(V-) - 0.3 to (V+) + 0.3
or 30 mA, whichever occurs first
Continuous Current (Any terminal)
Peak Current, S or D (Pulsed 1 ms, 10 % duty cycle)
30
mA
100
Storage Temperature
- 65 to 150
°C
Power Dissipation^b
16-Pin TSSOP^c
16-Pin miniQFN^{d, e}
450
mW
525
Thermal Resistance^b
16-Pin TSSOP
16-Pin miniQFN^e
178
°C/W
152
Notes:
a. Signals on SX, DX, or INX exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings.
b. All leads welded or soldered to PC board.
c. Derate 5.6 mW/°C above 70 °C.
d. Derate 6.6 mW/°C above 70 °C.
e. Manual soldering with iron is not recommended for leadless components. The miniQFN-16 is a leadless package. The end of the lead terminal
is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper lip cannot be
guaranteed and is not required to ensure adequate bottom side solder interconnection.
SPECIFICATIONS FOR DUAL SUPPLIES
Parameter
Analog Switch
Symbol
Test Conditions
Unless Otherwise Specified
V_IN(A,
V_CC = + 5 V, V_EE
B, C and ENABLE) ⁼
=-5V
2.0 V, 0.8
V^a
Analog Signal Range^{e V}ANALOG
On-Resistance
R_ON
I_S = 1 mA, V_D = - 3 V, 0 V, + 3 V
On-Resistance Match
R_ON
I_S = 1 mA, V_D = ± 3 V
On-Resistance
Flatness
R_FLATNESS
I_S = 1 mA, V_D = - 3 V, 0 V, + 3 V
Switch Off
Leakage Current
I_S(off)
I_D(off)
V+ = 5.5 V, V- = - 5.5 V,
V_D = ± 4.5 V, V_S = 4.5 V
Channel On
Leakage Current
Digital Control
Input Current, V_IN Low
I_D(on)
I_IL
Input Current, V_IN High
I_IH
Input Capacitance^e
C_IN
Dynamic Characteristics
Off Isolation
OIRR
Channel-to-Channel
Crosstalk
X_TALK
Bandwith, 3 dB
BW
V+ = 5.5 V, V- = - 5.5 V,
V_S = V_D = ± 4.5 V
V_{IN(A, B, C and ENABLE)}
under test = 0.8 V
V_{IN(A, B, C and ENABLE)}
under test = 2.0 V
f = 1 MHz
R_L = 50 , C_L = 1 pF
R_L = 50 
f = 10 MHz
f = 100 MHz
f = 10 MHz
f = 100 MHz
DG4051A
DG4052A
DG4053A
Temp.^b
Full
Room
Full
Room
Full
Room
Full
Room
Full
Room
Full
Room
Full
Full
Full
Room
Room
Room
Room
Room
Room
Room
Room
- 40 °C to 125 °C - 40 °C to 85 °C
Typ.^c Min.^d Max.^d Min.^d Max.^d
-5
5
-5
5
66
100
100
125
118
3
6
6
10
8
12
16
16
20
18
± 0.02 - 1
1
-1
1
- 50
50
-5
5
± 0.02 - 1
1
-1
1
- 50
50
-5
5
± 0.02 - 1
1
-1
1
- 50
50
-5
5
0.01
-1
1
-1
1
0.01
-1
1
-1
1
3.4
67
46
67
47
330
450
730
Unit
V

nA
µA
pF
dB
MHz
Document Number: 69828
S10-1383-Rev. E, 21-Jun-10
www.vishay.com
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