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DG3157 Datasheet, PDF (3/6 Pages) Vishay Siliconix – High-Speed, Low rON, SPDT Analog Switch (2:1 Multiplexer/Demultiplexer Bus Switch)
New Product
DG3157
Vishay Siliconix
SPECIFICATIONS
Parameter
Symbol
AC Electrical Characteristice
Prop Delay Timef
tPHL/tPLH
Output Enable Timef
tPZL/tPZH
Output Disable Timef
tPLZ/tPHZ
Break-Before-Make Timed
tBBM
Charge Injectiond
Q
Analog Switch Characteristics
Off Isolationd
Crosstalkd
−3-db Bandwidthd
OIRR
XTALK
BW
Capacitance
Control Pin Capacitanced
B Port Off Capacitanced
A Port Capacitance When
Switch Enabled
CIN
CIO-B
CIO-A(on)
Test Conditions
Otherwise Unless Specified
V+ = 3.0 V, VS = 0.25 V to 0.7 V+e
Tempa
Limits
−40 to 85_C
Minb Typc Maxb
Unit
V+ =1.65 to 1.95 V
Full
V+ =2.3 to 2.7 V
Full
1.2
VA = 0 V
V+ =3.0 to 3.6 V
Full
0.8
V+ =4.5 to 5.5 V
Full
0.3
Room
10.2
V+ =1.65 to 1.95 V
Full
10.4
Room
5.9
V+ =2.3 to 2.7 V
VLOAD = 2 x V+ for tPZL
Full
6.2
VLOAD = 0 V for tPZH
Room
4.1
V+ =3.0 to 3.6 V
Full
4.5
Room
2.6
V+ =4.5 to 5.5 V
Full
2.9
ns
Room
10.2
V+ =1.65 to 1.95 V
Full
10.4
Room
5.9
V+ =2.3 to 2.7 V
VLOAD = 2 x V+ for tPLZ
Full
6.2
VLOAD = 0 V for tPHZ
Room
4.1
V+ =3.0 to 3.6 V
Full
4.5
Room
2.6
V+ =4.5 to 5.5 V
Full
2.9
V+ =1.65 to 1.95 V
Full
0.5
V+ =2.3 to 2.7 V
Full
0.5
V+ =3.0 to 3.65 V
Full
0.5
V+ =4.5 to 5.5 V
Full
0.5
CL = 0.1 nF, VGEN = 0 V
V+ = 5 V
Room
7
RGEN = 0 W
V+ = 3.3 V
Room
3
pC
RL = 50 W, f = 10 MHz
RL = 50 W
V+ = 0 V
V+ = 5 V
Room
Room
Room
Room
Room
Room
−57.6
−58.7
u250
4.9
t6.5
t18.5
dB
MHz
pF
Notes:
a. Room = 25°C, Full = as determined by the operating suffix.
b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
c. Typical values are for design aid only, not guaranteed nor subject to production testing.
d. Guarantee by design, nor subjected to production test.
e. VIN = input voltage to perform proper function.
f. Guaranteed by design and not production tested. The bus switch propagation delay is a function of the RC time constant contributed by the on-resistance and
the specified load capacitance with an ideal voltage source (zero output impedance) driving the switch.
Document Number: 72648
S-32552—Rev. A, 15-Dec-03
www.vishay.com
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