DG201B_08 Datasheet, PDF (3/10 Pages) Vishay Siliconix – Improved Quad CMOS Analog Switches

DG201B/202B
Vishay Siliconix
SCHEMATIC DIAGRAM (TYPICAL CHANNEL)
V+
5V
Reg
Level
Shift/
Drive
IN_X
GND
V-
SPECIFICATIONS^a
Parameter
Analog Switch
Analog Signal Range^e
Drain-Source
On-Resistance
r_DS(on) Match
Source Off Leakage Current
Symbol
V_ANALOG
r_DS(on)
Δr_DS(on
I_S(off)
Drain Off Leakage Current
I_D(off)
Drain On Leakage Current
Digital Control
Input Voltage High
Input Voltage Low
Input Current
Input Capacitance
Dynamic Characteristics
Turn-On Time
I_D(on)
V_INH
V_INL
I_INH or I_INL
C_IN
t_ON
Turn-Off Time
t_OFF
Charge Injection
Source-Off Capacitance
Drain-Off Capacitance
Channel On Capacitance
Off Isolation
Channel-to-Channel
Crosstalk
Power Supply
Positive Supply Current
Q
C_S(off)
C_D(off)
C_D(on)
OIRR
X_TALK
I+
Negative Supply Current
I-
Power Supply Range for
Continuous Operation
V_OP
Figure 1.
Test Conditions
Unless Specified
V+ = 15 V, V- = - 15 V
V_IN = 2.4 V, 0.8 V^f
V_D = ± 10 V, I_S = 1 mA
V_S = ± 14 V, V_D = ± 14 V
V_D = ± 14 V, V_S = ± 14 V
V_S = V_D = ± 14 V
V_INH or V_INL
V_S = 2 V
See Switching Time Test Circuit
C_L = 1000 pF, V_g = 0 V
R_g = 0 Ω
V_S = 0 V, f = 1 MHz
V_D = V_S = 0 V, f = 1 MHz
C_L = 15 pF, R_L = 50 Ω
V_S = 1 V_RMS, f = 100 kHz
V_IN = 0 or 5 V
S_X
V-
V+
D_X
A Suffix
D Suffix
- 55 to 125 °C - 40 to 85 °C
Temp^b Typ^c Min^d Max^d Min^d Max^d Unit
Full
- 15 15 - 15 15 V
Room 45
Full
85
85
100
100 _Ω
Room 2
Room ± 0.01 - 0.5 0.5 - 0.5 0.5
Full
- 20 20 - 5
5
Room ± 0.01 - 0.5
Full
- 20
0.5
20
- 0.5
-5
0.5
5
nA
Room ± 0.02 - 0.5 0.5 - 0.5 0.5
Full
- 40 40 - 10 10
Full
Full
Full
Room 5
2.4
2.4
V
0.8
0.8
-1
1
-1
1 µA
pF
Room 120
300
300
Full
Room 65
ns
200
200
Full
Room 1
pC
Room 5
Room 5
pF
Room 16
Room 90
dB
Room 95
Room
Full
Room
Full
Full
50
50
100
100 _µA
-1
-1
-5
-5
± 4.5 ± 22 ± 4.5 ± 22 V
Document Number: 70037
S-71155–Rev. H, 11-Jun-07
www.vishay.com
3