CRA04S_08 Datasheet, PDF (3/4 Pages) Vishay Siliconix – Thick Film Resistor Array

CRA04S
Vishay
Thick Film Resistor Array
TEST PROCEDURES AND REQUIREMENTS
EN 60115-1
TEST
(clause)
CONDITIONS OF TEST
REQUIREMENTS
PERMISSIBLE CHANGE (ΔR/R) ⁽¹⁾
STABILITY
STABILITY
CLASS 1 OR BETTER CLASS 2 OR BETTER
Stability for product types:
CRA04S
10 Ω to 1 MΩ
10 Ω to 1 MΩ
Resistance (4.5)
Temperature coefficient (4.8.4.2)
Overload (4.13)
Solderability (4.17.5) ⁽²⁾
Resistance to soldering heat (4.18.2)
-
20/- 55/20 °C and
20/125/20 °C
U = 2.5 × (P₇₀ x R)^1/2
≤ 2 x U_max.; 0.5 s
Aging 4 h at 155 °C, dryheat
solder bath method; 235 °C; 2 s
visual examination
Solder bath method;
(260 ± 5) °C; (10 ± 1) s
±1%
± 100 ppm/K
± 2 %; ± 5 %
± 200 ppm/K
± (0.25 % R + 0.05 Ω)
± (0.5 % R + 0.05 Ω)
Good tinning (≥ 95 % covered)
no visible damage
± (0.25 % R + 0.05 Ω)
± (0.5 % R + 0.05 Ω)
Rapid change of temperature (4.19)
30 min at LCT = - 55 °C;
30 min at UCT = 125 °C; 5 cycles
± (0.25 % R + 0.05 Ω)
± (0.5 % R + 0.05 Ω)
Damp heat, steady state (4.24)
Climatic sequence (4.23)
Endurance at 70 °C (4.25.1)
Extended endurance (4.25.1.8)
Endurance at upper category
temperature (4.25.3)
(40 ± 2) °C; 56 days;
(93 ± 3) % RH
16 h at UCT = 125 °C; 1 cycle at 55 °C;
2 h at LCT = - 55 °C;
1 h/1 kPa at 15 °C to 35 °C;
5 cycles at 55 °C
U = (P₇₀ x R)^1/2
U = U_max.; whichever is less severe
U = (P₇₀ x R)^1/2
U = U_max.; whichever is less severe
1.5 h ON; 0.5 h OFF;
70 °C; 1000 h
Duration extended to 8000 h
UCT = 125 °C; 1000 h
± (1 % R + 0.05 Ω)
± (1 % R + 0.05 Ω)
± (1 % R + 0.05 Ω)
± (2 % R + 0.1 Ω)
± (1 % R + 0.05 Ω)
± (2 % R + 0.1 Ω)
± (2 % R + 0.1 Ω)
± (2 % R + 0.1 Ω)
± (4 % R + 0.1 Ω)
± (2 % R + 0.1 Ω)
Notes
(1) _{Figures are given for a single element}
(2) _{Solderability is specified for 2 years after production or requalification. Permitted storage time is 20 years}
APPLICABLE SPECIFICATIONS
• EN 60115-1
• EN 140400
• EN 140401-802
• IEC 60068-2-X
• EIA 481
Generic Specification
Sectional Specification
Detail Specification
Variety of environmental test procedures
Packaging of SMD components
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Document Number: 31043
Revision: 13-Oct-08