Si4920DY Datasheet, PDF (2/3 Pages) Fairchild Semiconductor – Dual N-Channel, Logic Level, PowerTrench MOSFET

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Comp_Sle_Pte_{ICE Device Model Si4920DY}
Vishay Siliconix
SPECIFICATIONS (TJ = 25°C UNLESS OTHERWISE NOTED)
Parameter
Symbol
Test Conditions
Static
Gate Threshold Voltage
On-State Drain Current^a
Drain-Source On-State Resistance^a
VGS(th)
ID(on)
rDS(on)
Forward Transconductance^a
gfs
Diode Forward Voltage^a
VSD
Dynamic^b
Total Gate Charge
Qg
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
Turn-On Delay Time
td(on)
Rise Time
tr
Turn-Off Delay Time
td(off)
Fall Time
tf
Source-Drain Reverse Recovery Time
trr
Notes
a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2%
b. Guaranteed by design, not subject to production testing
VDS = VGS, ID = 250 µA
VDS ≥ 5 V, VGS = 10 V
VGS = 10 V, ID = 6.9 A
VGS = 4.5 V, ID = 5.8 A
VDS = 15 V, ID = 6.9 A
IS = 1.7 A, VGS = 0 V
VDS = 15 V, VGS = 10 V, ID = 6.9 A
VDD = 15 V, RL = 15 Ω
ID ≅ 1 A, VGEN = 10 V, RG = 6 Ω
IF = 1.7 A, di/dt = 100 A/µs
Simulated Measured
Data
Data
2
238
0.020
0.023
23
0.72
0.020
0.026
25
29
30
7.5
7.5
3.5
3.5
10
12
13
10
15
60
32
15
32
50
Unit
V
A
Ω
S
V
nC
Ns
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Document Number: 71008
18-May-04