SI9430DY Datasheet, PDF (2/3 Pages) Fairchild Semiconductor – Single P-Channel Enhancement Mode MOSFET

SPICE Device Model Si9430DY
Vishay Siliconix
SPECIFICATIONS (T_J = 25°C UNLESS OTHERWISE NOTED)
Parameter
Symbol
Test Conditions
Static
Gate Threshold Voltage
On-State Drain Current^a
Drain-Source On-State Resistance^a
Forward Transconductance^a
Diode Forward Voltage^a
Dynamic^b
Total Gate Charge^b
Gate-Source Charge^b
Gate-Drain Charge^b
Turn-On Delay Time^b
Rise Time^b
Turn-Off Delay Time^b
Fall Time^b
Source-Drain Reverse Recovery Time
V_GS(th)
I_D(on)
r_DS(on)
g_fs
V_SD
Q_g
Q_gs
Q_gd
t_d(on)
t_r
t_d(off)
t_f
t_rr
V_DS = V_GS, I_D = −250 µA
V_DS = −5 V, V_GS = −10 V
V_DS = −5 V, V_GS = −4.5 V
V_GS = −10 V, I_D = −5.3 A
V_GS = −6 V, I_D = −3.6 A
V_GS = −4.5 V, I_D = − 2.0 A
V_DS = −15 V, I_D = −5.3 A
I_S = −2.4 A, V_GS = 0 V
V_DS = −10 V, V_GS = −10 V, I_D = −5.3 A
V_DD = −10 V, R_L = 10 Ω
I_D ≅ −1 A, V_GEN = −10 V, R_G = 6 Ω
I_F = −2.4A, di/dt = 100 A/µs
Notes
a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2%.
b. Guaranteed by design, not subject to production testing.
Typical
2.2
117
14
0.033
0.042
0.055
9.3
−0.76
26.4
4.5
5.6
15
21
35
45
66
Unit
V
A
Ω
S
V
nC
ns
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2
Document Number: 70512
01-Jun-04