SI6542DQ Datasheet, PDF (2/6 Pages) Vishay Siliconix – Dual N- and P-Channel 20-V (D-S) MOSFET

Si6542DQ
Vishay Siliconix
SPECIFICATIONS (T_J = 25_C UNLESS OTHERWISE NOTED)
Parameter
Symbol
Test Condition
Static
Gate Threshold Voltage
Gate-Body Leakage
Zero Gate Voltage Drain Current
On-State Drain Current^a
Drain-Source On-State Resistance^a
Forward Transconductance^a
Diode Forward Voltage^a
Dynamic^b
V_GS(th)
I_GSS
I_DSS
I_D(on)
r_DS(on)
g_fs
V_SD
V_DS = V_GS, I_D = 250 mA
V_DS = V_GS, I_D = –250 mA
V_DS = 0 V, V_GS = "20 V
V_DS = 20 V, V_GS = 0 V
V_DS = –20 V, V_GS = 0 V
V_DS = 20 V, V_GS = 0 V, T_J = 55_C
V_DS = –20 V, V_GS = 0 V, T_J = 55_C
V_DS = 5 V, V_GS = 10 V
V_DS = –5 V, V_GS = –10 V
V_GS = 10 V, I_D = 2.5 A
V_GS = –10 V, I_D = 1.9 A
V_GS = 4.5 V, I_D = 1.8 A
V_GS = –4.5 V, I_D = 1.3 A
V_DS = 15 V, I_D = 2.5 A
V_DS = –15 V, I_D = – 1.9 A
I_S = 1.25 A, V_GS = 0 V
I_S = –1.25 A, V_GS = 0 V
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Q_g
N-Channel
V_DS = 10 V, V_GS = 10 V, I_D = 2.5 A
Q_gs
P-Channel
V_DS = –10 V, V_GS = –10 V, I_D = –1.9 A
Q_gd
Turn-On Delay Time
t_d(on)
Rise Time
t_r
Turn-Off Delay Time
t_d(off)
Fall Time
t_f
Source-Drain Reverse Recovery Time
t_rr
Notes
a. Pulse test; pulse width v 300 ms, duty cycle v 2%.
b. Guaranteed by design, not subject to production testing.
N-Channel
V_DD = 10 V, R_L = 10 W
I_D ^ 1 A, V_GEN = 10 V, R_G = 6 W
P-Channel
V_DD = –10 V, R_L = 10 W
I_D ^ –1 A, V_GEN = –10 V, R_G = 6 W
I_F = 1.25 A, di/dt = 100 A/ms
I_F = –1.25 A, di/dt = 100 A/ms
Min Typ Max Unit
N-Ch
1.0
V
P-Ch
–1.0
"100
nA
N-Ch
1
P-Ch
N-Ch
–1
mA
25
P-Ch
–25
N-Ch
14
A
P-Ch
–10
N-Ch
0.065 0.09
P-Ch
N-Ch
0.13
0.17
W
0.100 0.175
P-Ch
0.26
0.32
N-Ch
5
S
P-Ch
3
N-Ch
P-Ch
0.8
1.2
V
0.8
–1.2
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
7
10
7
10
0.9
nC
1.3
2.1
1.7
11
20
9
20
11
20
12
25
16
30
ns
17
30
6
15
6
15
45
70
35
70
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2-2
Document Number: 70171
S-00873—Rev. F, 01-May-00