DG2302_08 Datasheet, PDF (2/5 Pages) Vishay Siliconix – High-Speed, Low rON, SPST Analog Switch (1-Bit Bus Switch with Level-Shifter)

DG2302
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
Parameter
Limit
Unit
Reference V+ to GND
OE, A, B^a
- 0.3 to + 6
V
- 0.3 to (V+ + 0.3)
Continuous Current (Any terminal)
Peak Current (Pulsed at 1 ms, 10 % duty cycle)
± 50
mA
± 200
Storage Temperature
(D Suffix)
- 65 to 150
°C
Power Dissipation Packages^b
5-Pin SC70^c
250
mW
Notes:
a. Signals on A, or B or OE exceeding V+ will be clamped by internal diodes. Limit forward diode current to maximum current ratings.
b. All leads welded or soldered to PC Board.
c. Derate 3.1 mW/°C above 70 °C.
SPECIFICATIONS (V+ = 5.0 V)
Parameter
DC Characteristics
Symbol
Test Conditions
Otherwise Unless Specified
V+ = 5 V, ± 10 %,V_IN = 0.8 or 2.0 V^e
Temp^a
Limits
- 40 to 85 °C
Min^b Typ^c Max^b
Unit
V+ = 4.5 V, V_A = 0 V, I_B = 64 mA
Full
7
On Resistance
r_ON
V+ = 4.5 V, V_A = 0 V, I_B = 30 mA
Full
7
Ω
V+ = 4.5 V, V_A = 2.4 V, I_B = 15 mA
Full
50
Switch Off Leakage Current
I_(off)
Switchl-On Leakage Current I_(on)
V+ = 5.5 V, V_A = 1 V/4.5 V, V_B = 4.5 V/1 V
V+ = 5.5 V, V_A = V_B = 1 V/4.5 V
Full
- 10
Full
- 10
10
10
µA
Input High Voltage
V_IH
Input Low Voltage
V_IL
Full
2.0
Full
V
0.8
Input Current
I_IL or I_IH
V_OE = 0 or V+
Full
-1
1
µA
Dynamic Characteristics
Prop Delay Bus to Bus^f
t_PHL
t_PLH
V_LD = Open (Figure 1 and 2)
Full
Full
1
1
Output Enable Time^d
t_PZL V_LD = 7 V, V+ = 4.5 V to 5.5 V (Figure 1 and 2) Full
t_PZH V_LD = Open, V+ = 4.5 V to 5.5 V (Figure 1 and 2) Full
5.0
5.0
ns
Output Disable Time^d
t_PLZ V_LD = 7 V, V+ = 4.5 V to 5.5 V (Figure 1 and 2) Full
t_PHZ V_LD = Open, V+ = 4.5 V to 5.5 V (Figure 1 and 2) Full
3.9
1.0
Input Capacitance
C_in
Room
3.5
Channel-Off Capacitance^d
Channel-On Capacitance^d
C_(off)
C_ON
V_OE = 0 or V+ f = 1 MHz
Room
Room
5
11
pF
Power Supply
Power Supply Range
V+
4.0
55
V
Power Supply Current
I+
V_OE = 0 V
V_OE = V+
0.9
1.5
mA
1.0
µA
Notes:
a. Room = 25 °C, Full = as determined by the operating suffix.
b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
c. Typical values are for design aid only, not guaranteed nor subject to production testing.
d. Guarantee by design, nor subjected to production test.
e. V_IN = input voltage to perform proper function.
f. Guaranteed by design and not production tested. The bus switch propagation delay is a function of the RC time constant contributed by the
on-resistance and the specified load capacitance with an ideal voltage source (zero output impedance) driving the switch.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
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Document Number: 72072
S-70852–Rev. B, 30-Apr-07