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XOSM-52_11 Datasheet, PDF (1/3 Pages) Vishay Siliconix – Half Size Clock Oscillator Enable/Disable
Half Size Clock Oscillator Enable/Disable
XOSM-52
Vishay Dale
The XOSM-52 series oscillator is half size, has tri-state
enable/disable controlled function. The metal package with
pin 4 case ground acts as shielding to minimize EMI
radiation.
FEATURES
• Size: 8 pin half size
• Industry standard
• Tri-state enable/disable
• Wide frequency range
• Low cost
• Resistance weld package
• 5V
• Compliant to RoHS Directive 2002/95/EC
• Halogen-free according to IEC 61249-2-21 definition
STANDARD ELECTRICAL SPECIFICATIONS
PARAMETER
SYMBOL
CONDITION
VALUE
Frequency range
FO
Frequency stability (1)
-
all conditions
1.000 MHz to 100.000 MHz
± 25 ppm, ± 50 ppm, ± 100 ppm
Operating temperature range
TOPR
-
0 ºC to 70 ºC
- 40 ºC to + 85 ºC (option)
Storage temperature range
Power supply voltage
Aging (first year)
TSTG
VDD
-
-
25 ºC ± 3 ºC
- 55 ºC to + 125 ºC
5.0 V ± 10 %
± 5 ppm
1.000 MHz to 23.999 MHz
20 mA max.
Supply current
24.000 MHz to 49.999 MHz
IDD
50.000 MHz to 69.999 MHz
30 mA max.
40 mA max.
Output symmetry
Rise time
Fall time
Output voltage
Output load
Start-up time
Pin 1, tri-state function
Sym
tr
tf
VOH
VOL
TTL load
HCMOS load
ts
70.000 MHz to 100.000 MHz
at 1/2 VDD
20 % VDD to 80 % VDD
80 % VDD to 20 % VDD
-
-
-
-
-
-
-
-
60 mA max.
40 %/60 % (45 %/55 % option)
10 ns max.
10 ns max.
90 % VDD min.
10 % VDD max.
1 TTL to 10 TTL
to 50M: 50 pF
to 70M: 30 pF
to 100M: 15 pF
10 ms max.
pin 1 = H or open (output active at pin 5)
Note
(1) Include: 25 °C tolerance, operating temperature range, input voltage change, aging, load change, shock vibration
DIMENSIONS in inches [millimeters]
STANDARD PIN ORIENTATION
0.508
[12.9] max.
0.300 ± 0.004
[7.62 ± 0.102]
1
4
0.426 ± 0.004
[10.82 ± 0.102]
0.306
[7.77]
max.
STD
8
5
0.512
[13.1] max.
0.300 ± 0.004
[7.62 ± 0.102]
0.508
[12.9] max.
0.018
[0.45]
0.070 [1.78] max.
ENABLE/DISABLE FUNCTION
INPUT (PIN 1) OUTPUT (PIN 5)
OPEN
ENABLE
VIH ≥ 2.2 VDC
ENABLE
PIN CONNECTION
#1 N.C
#4 GND
#5 OUTPUT
#8 VDD
- 85 PIN ORIENTATION
0.508
[12.9] max.
0.300 ± 0.004
[7.62 ± 0.102]
+ 5.0 V
+ 3.3 V
HCMOS TEST CIRCUIT
A
Test Point
V
0.01 µF #8
#5
#1
#4
CMOS Load
CL (1)
CL = 15 pF or 50 pF
(see individual
spec. sheet)
4
5
- 85
1
8
0.300 ± 0.004
[7.62 ± 0.102]
Note
INH
(1) Includes Stray and Probe Capacitance Enable/Disable function
HCMOS OUTPUT WAVEFORM
0.508
[12.9] max.
VOH
Tr
Tf
90 %VDD
0.512
[13.1] max.
0.018
[0.45]
VOL
T1
T0 = 1/Fo
50 %VDD
10 %VDD
GND
SYMMETRY =
T1
T0
x 100 %
Document Number: 35026
Revision: 08-Mar-11
For technical questions, contact: frequency@vishay.com
www.vishay.com
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