XO-52_11 Datasheet, PDF (1/3 Pages) Vishay Siliconix – Half Size Clock Oscillator Enable/Disable

Half Size Clock Oscillator Enable/Disable
XO-52
Vishay Dale
The XO-52 series oscillator is half size, has tri-state
enable/disable controlled function. The metal package with
pin 4 case ground acts as shielding to minimize EMI
radiation.
FEATURES
• Size: 8 pin half size
• Industry standard
• Tri-state enable/disable
• Wide frequency range
• Low cost
• Resistance weld package
• 5V
• Compliant to RoHS Directive 2002/95/EC
• Halogen-free according to IEC 61249-2-21 definition
STANDARD ELECTRICAL SPECIFICATIONS
PARAMETER
Frequency range
Frequency stability ⁽¹⁾
Operating temperature range
Storage temperature range
Power supply voltage
Aging (first year)
SYMBOL
F_O
T_OPR
T_STG
V_DD
Supply current
I_DD
Output symmetry
Rise time
Fall time
Output voltage
Output load
Start-up time
Pin 1, tri-state function
Sym
t_r
t_f
V_OH
V_OL
TTL load
HCMOS load
t_s
CONDITION
-
all conditions
-
-
-
25 ºC ± 3 ºC
1.000 MHz to 23.999 MHz
24.000 MHz to 49.999 MHz
50.000 MHz to 69.999 MHz
70.000 MHz to 100.000 MHz
at ¹/₂ V_DD
20 % V_DD to 80 % V_DD
80 % V_DD to 20 % V_DD
-
-
-
-
-
-
-
-
VALUE
1.000 MHz to 100.000 MHz
± 25 ppm, ± 50 ppm, ± 100 ppm
0 ºC to 70 ºC
- 40 ºC to + 85 ºC (option)
- 55 ºC to + 125 ºC
5.0 V ± 10 %
± 5 ppm
20 mA max.
30 mA max.
40 mA max.
60 mA max.
40 %/60 % (45 %/55 % option)
10 ns max.
10 ns max.
90 % V_DD min.
10 % V_DD max.
1 TTL to 10 TTL
to 50M: 50 pF
to 70M: 30 pF
to 100M: 15 pF
10 ms max.
pin 1 = H or open (output active at pin 5)
pin 1 = L (high impedance at pin 5)
Note
(1) _{Include: 25 °C tolerance, operating temperature range, input voltage change, aging, load change, shock vibration}
DIMENSIONS in inches [millimeters]
MARKING
AREA
0.508
[12.9] max.
#1 #4
#8 #5
0.300 ± 0.005
[7.62 ± 0.13]
0.300 ± 0.005
[7.62 ± 0.13]
0.220
[5.6] max.
0.031 ± 0.003
[0.8 ± 0.1]
0.580 [12.9] max.
0.018 ± 0.003
[0.45 ± 0.1]
0.268
[6.80] max.
ENABLE/DISABLE FUNCTION
INPUT (PIN 1) OUTPUT (PIN 5)
OPEN
ENABLE
VIH ≥ 2.2 VDC ENABLE
+ 5.0 V
+ 3.3 V
HCMOS TEST CIRCUIT
A
Test Point
V
0.01 µF ^#8
#5
#1
#4
CMOS Load
CL ⁽¹⁾
CL = 15 pF or 50 pF
(see individual
spec. sheet)
Note
INH
(1) _{Includes Stray and Probe Capacitance Enable/Disable function}
HCMOS OUTPUT WAVEFORM
VOH
Tr
Tf
90 % VDD
PIN CONNECTION
#1 N.C.
#4 GND
#5 OUTPUT
#8 VDD
VOL
T1
T0 = 1/Fo
50 % VDD
10 % VDD
GND
SYMMETRY =
T1
T0
x 100 %
Document Number: 35025
Revision: 08-Mar-11
For technical questions, contact: [e-mail]
www.vishay.com
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