TA33_08 Datasheet, PDF (1/3 Pages) Vishay Siliconix – Dual Value Chip Resistors, Center Tap

TA 33
Vishay Sfernice
Dual Value Chip Resistors, Center Tap
Actual Size
These tantalum chips combine excellent stability 0.07 %
(2000 h, rated power at + 70 °C) with great power handling
capacity. Two bonding pads per termination allow greater
flexibility in hybrid layout design.
FEATURES
• Center tap feature
• Resistor material: self-passivating
Tantalum Nitride
• Silicon substrate for good power dissipation
• Low cost
• Wirebondable
TYPICAL PERFORMANCE
TCR
ABS
100 ppm/°C
TRACKING
5 ppm/°C
ABS
RATIO
TOL.
0.5 %
0.5 %
SCHEMATIC
R_T
R₁
R₂
R_T = R₁ + R₂ with R₁ = R₂ Standard
STANDARD ELECTRICAL SPECIFICATIONS
TEST
SPECIFICATIONS
MATERIAL
TANTALUM NITRIDE
Resistance range
50 Ω to 1 MΩ
TCR:
Tracking
Absolute
± 5 ppm/°C
± 100 ppm/°C (± 50 ppm/°C on request)
Ohmic value
Ratio
1/1 standard (unequal values: please consult)
Tolerance:
Absolute
Matching
± 0.5 %, ± 1 %, ± 2 %
± 0.5 % standard
Power dissipation
250 mW at + 25 °C, 125 mW at + 70 °C, 50 mW at + 125 °C
Stability
± 0.07 % typical, ± 0.1 maximum
Working voltage
Operating temperature range
50 V_DC on R_T
- 55 °C to + 155 °C
Storage temperature range
- 55 °C to + 155 °C
Noise
< - 35 dB typical
Thermal EMF
0.01 µV/°C
Shelf life stability
100 ppm
CONDITIONS
for R_T = R₁ + R₂
- 55 °C to + 155 °C
- 55 °C to + 155 °C
2000 h at + 70 °C under Pn
MIL-STD-202 Method 308
1 year at + 25 °C
* Please see document “Vishay Green and Halogen-Free Definitions (5-2008)” http://www.vishay.com/doc?99902
www.vishay.com
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For technical questions, contact: [e-mail]
Document Number: 60066
Revision: 06-Oct-08