SIR668DP Datasheet, PDF (1/7 Pages) Vishay Siliconix – N-Channel 100 V (D-S) MOSFET

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SiR668DP
Vishay Siliconix
N-Channel 100 V (D-S) MOSFET
PowerPAK^® SO-8 Single
D
D8
D7
D6
5
6.15 _mm
1
5.15 ^mm
Top View
PRODUCT SUMMARY
V_DS (V)
R_DS(on) max. () at V_GS = 10 V
R_DS(on) max. () at V_GS = 7.5 V
Q_g typ. (nC)
I_D (A)
Configuration
1
2S
3S
4S
G
Bottom View
100
0.00480
0.00505
55
95
Single
FEATURES
• TrenchFET^® Gen IV power MOSFET
• Very low R_DS - Q_g figure-of-merit (FOM)
• Tuned for the lowest R_DS - Q_oss FOM
• 100 % R_g and UIS tested
• Material categorization: for definitions of
compliance please see www.vishay.com/doc?99912
APPLICATIONS
• Synchronous rectification
• Primary side switch
• DC/DC converters
• OR-ing
• Power supplies
• Motor drive control
• Battery and load switch
D
G
S
N-Channel MOSFET
ORDERING INFORMATION
Package
Lead (Pb)-free and halogen-free
PowerPAK SO-8
SiR668DP-T1-RE3
ABSOLUTE MAXIMUM RATINGS (T_A = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
Drain-source voltage
Gate-source voltage
Continuous drain current (T_J = 150 °C)
Pulsed drain current (t = 100 μs)
T_C = 25 °C
T_C = 70 °C
T_A = 25 °C
T_A = 70 °C
Continuous source-drain diode current
Single pulse avalanche current
Single pulse avalanche energy
T_C = 25 °C
T_A = 25 °C
L = 0.1 mH
T_C = 25 °C
Maximum power dissipation
T_C = 70 °C
T_A = 25 °C
T_A = 70 °C
Operating junction and storage temperature range
Soldering recommendations (peak temperature) ^c
V_DS
V_GS
I_D
I_DM
I_S
I_AS
E_AS
P_D
T_J, T_stg
LIMIT
100
± 20
95
76
23.2 ^{b, c}
18.6 ^{b, c}
200
94
5.6 ^{b, c}
35
61.2
104
66.6
6.25 ^{b, c}
4 ^{b, c}
-55 to +150
260
UNIT
V
A
mJ
W
°C
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYPICAL
MAXIMUM
UNIT
Maximum junction-to-ambient ^b
t  10 s
R_thJA
15
Maximum junction-to-case (drain)
Steady state
R_thJC
0.9
20
°C/W
1.2
Notes
a. Package limited.
b. Surface mounted on 1" x 1" FR4 board.
c. t = 10 s.
d. See solder profile (www.vishay.com/doc?73257). The PowerPAK 1212-8 is a leadless package. The end of the lead terminal is exposed
copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed
and is not required to ensure adequate bottom side solder interconnection.
e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components.
f. Maximum under steady state conditions is 54 °C/W.
g. T_C = 25 °C.
S16-2422-Rev. A, 28-Nov-16
1
Document Number: 75351
For technical questions, contact: [e-mail]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000