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SIE820DF Datasheet, PDF (1/10 Pages) Vishay Siliconix – N-Channel 20-V (D-S) MOSFET
N-Channel 20-V (D-S) MOSFET
SiE820DF
Vishay Siliconix
PRODUCT SUMMARY
ID (A)a
VDS (V)
RDS(on) (Ω)
Silicon Package
Limit Limit Qg (Typ.)
0.0035 at VGS = 4.5 V 136
50
20
43 nC
0.0064 at VGS = 2.5 V 100
50
Package Drawing
www.vishay.com/doc?73398
PolarPAK
10 9 8
7
6
D GS
S
D
6
7
8 9 10
D
D
S
GD
FEATURES
• Halogen-free According to IEC 61249-2-21
Definition
• Extremely Low Qgd WFET Technology for
Low Switching Losses
• TrenchFET® Power MOSFET
• Ultra Low Thermal Resistance Using Top-
Exposed PolarPAK® Package for Double-Sided Cooling
• Leadframe-Based New Encapsulated Package
- Die Not Exposed
- Same Layout Regardless of Die Size
• Low Qgd/Qgs Ratio Helps Prevent Shoot-Through
• 100 % Rg and UIS Tested
• Compliant to RoHS directive 2002/95/EC
APPLICATIONS
• VRM
• DC/DC Conversion
D
• Synchronous Rectification
D GS
S
D
1 23
4
5
5
4
32 1
Top View
Bottom View
Top surface is connected to pins 1, 5, 6, and 10
Ordering Information: SiE820DF-T1-E3 (Lead (Pb)-free)
SiE820DF-T1-GE3 (Lead (Pb)-free and Halogen-free)
G
S
N-Channel MOSFET
For Related Documents
www.vishay.com/ppg?74447
ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted
Parameter
Symbol
Limit
Unit
Drain-Source Voltage
Gate-Source Voltage
VDS
20
VGS
± 12
V
TC = 25 °C
136 (Silicon Limit)
50a (Package Limit)
Continuous Drain Current (TJ = 150 °C)
TC = 70 °C
ID
50a
TA = 25 °C
30b, c
TA = 70 °C
24b, c
A
Pulsed Drain Current
IDM
80
Continuous Source-Drain Diode Current
TC = 25 °C
TA = 25 °C
IS
50a
4.3b, c
Single Pulse Avalanche Current
L = 0.1 mH
IAS
30
Avalanche Energy
EAS
45
mJ
TC = 25 °C
104
Maximum Power Dissipation
TC = 70 °C
TA = 25 °C
PD
66
5.2b, c
W
TA = 70 °C
3.3b, c
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)d, e
TJ, Tstg
- 55 to 150
260
°C
Notes:
a. Package limited is 50 A.
b. Surface Mounted on 1" x 1" FR4 board.
c. t = 10 s.
d. See Solder Profile (www.vishay.com/doc?73257). The PolarPAK is a leadless package. The end of the lead terminal is exposed copper (not
plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not
required to ensure adequate bottom side solder interconnection.
e. Rework Conditions: manual soldering with a soldering iron is not recommended for leadless components.
Document Number: 74447
S09-1338-Rev. B, 13-Jul-09
www.vishay.com
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