DG406B_11 Datasheet, PDF (1/16 Pages) Vishay Siliconix – 16-Ch/Dual 8-Ch High-Performance CMOS Analog Multiplexers

DG406B, DG407B
Vishay Siliconix
16-Ch/Dual 8-Ch High-Performance CMOS Analog Multiplexers
DESCRIPTION
The DG406B is a 16-channel single-ended analog
multiplexer designed to connect one of sixteen inputs to a
common output as determined by a 4-bit binary address. The
DG407B selects one of eight differential inputs to a common
differential output. Break-before-make switching action
protects against momentary shorting of inputs.
An on channel conducts current equally well in both
directions. In the off state each channel blocks voltages up
to the power supply rails. An enable (EN) function allows the
user to reset the multiplexer/demultiplexer to all switches off
for stacking several devices. All control inputs, address (A_x)
and enable (EN) are TTL compatible over the full specified
operating temperature range.
Applications for the DG406B, DG407B include high speed
data acquisition, audio signal switching and routing, ATE
systems, and avionics. High performance and low power
dissipation make them ideal for battery operated and remote
instrumentation applications.
Designed in the 44 V silicon-gate CMOS process, the
absolute maximum voltage rating is extended to 44 volts,
allowing operation with ± 20 V supplies. Additionally single
(12 V) supply operation is allowed. An epitaxial layer
prevents latchup.
FEATURES
• Low on-resistance - R_DS(on): 45 
• Low charge injection - Q: 11 pC
• Fast transition time - t_TRANS: 115 ns
• Low oower: 0.2 mW
• Single supply capability
BENEFITS
• Higher accuracy
• Reduced glitching
• Improved data throughput
• Reduced power consumption
• Increased ruggedness
• Wide supply ranges: ± 5 V to ± 20 V
APPLICATIONS
• Data acquisition systems
• Audio signal routing
• Medical instrumentation
• ATE systems
• Battery powered systems
• High-rel systems
• Single supply systems
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG406B
Dual-In-Line and SOIC Wide-Body
DG407B
Dual-In-Line and SOIC Wide-Body
V+ ₁
NC ₂
NC ₃
S_{16 4}
S_{15 5}
S_{14 6}
S_{13 7}
S_{12 8}
S_{11 9}
S_{10 10}
S_{9 11}
GND ₁₂
NC ₁₃
A_{3 14}
Decoders/Drivers
28 ^D
27 ^V-
26 ^S8
25 ^S7
24 ^S6
23 ^S5
22 ^S4
21 ^S3
20 ^S2
19 ^S1
18 ^EN
17 ^A0
16 ^A1
15 ^A2
V+ ₁
D_{b 2}
NC ₃
S_{8b 4}
S_{7b 5}
S_{6b 6}
S_{5b 7}
S_{4b 8}
S_{3b 9}
S_{2b 10}
S_{1b 11}
GND ₁₂
NC ₁₃
NC ₁₄
Decoders/Drivers
28 ^Da
27 ^V-
26 ^S8a
25 ^S7a
24 ^S6a
23 ^S5a
22 ^S4a
21 ^S3a
20 ^S2a
19 ^S1a
18 ^EN
17 ^A0
16 ^A1
15 ^A2
Top View
* Pb containing terminations are not RoHS compliant, exemptions may apply
Top View
Document Number: 72552
S11-0179-Rev. C, 07-Feb-11
www.vishay.com
1