CS33_08 Datasheet, PDF (1/3 Pages) Vishay Siliconix – Dual Value Chip Resistors, Center Tap

CS 33
Vishay Sfernice
Dual Value Chip Resistors, Center Tap
Actual Size
Chromium silicon thin film is very well suited to produce high
density and high ohmic value resistor chips. Performances
and sizes are greatly improved compared to Thick Film
counterparts. The center tap configuration offers a greater
flexibility for hybrid layout design.
FEATURES
• Center tap feature
• Small size 30 mil x 30 mil
• Very high ohmic values (up to 5 MΩ)
• Good stability 0.1 % (2000 h, rated power,
at + 70 °C)
• Wirebondable
TYPICAL PERFORMANCE
TCR
ABS
100 ppm/°C
ABS
TRACKING
5 ppm/°C
RATIO
TOL.
0.5 %
0.5 %
SCHEMATIC
R_T
R₁
R₂
R_T = R₁ + R₂ with R₁ = R₂ Standard
STANDARD ELECTRICAL SPECIFICATIONS
TEST
SPECIFICATIONS
MATERIAL
PASSIVATED CHROMIUM SILICON
Resistance range
10 kΩ to 5 MΩ
TCR:
Tracking
Absolute
± 5 ppm/°C
± 100 ppm/°C (± 50 ppm/°C on request)
Ohmic value
Ratio
1/1 standard (unequal values: please consult)
Tolerance:
Absolute
Matching
± 0.5 %, ± 1 %, ± 2 %
± 0.5 % standard
Power rating
250 mW at + 25 °C, 125 mW at + 70 °C, 50 mW at + 125 °C
Stability
± 0.1 % typical, ± 0.2 maximum
Voltage coefficient
0.1 ppm/V
Working voltage
Operating temperature range
100 V_DC on R_T
- 55 °C to + 155 °C
Storage temperature range
- 55 °C to + 155 °C
Noise
< - 20 dB typical
Thermal EMF
< 0.01 µV/°C
Shelf life stability
200 ppm
CONDITIONS
for R_T = R₁ + R₂
- 55 °C to + 155 °C
- 55 °C to + 155 °C
2000 h at + 70 °C under Pn
MIL-STD-202 Method 308
1 year at + 25 °C
* Please see document “Vishay Green and Halogen-Free Definitions (5-2008)” http://www.vishay.com/doc?99902
www.vishay.com
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For technical questions, contact: [e-mail]
Document Number: 60067
Revision: 06-Oct-08