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BCM6123X60E10A5YZZ Datasheet, PDF (24/29 Pages) Vicor Corporation – Fixed Ratio DC-DC Converter
BCM6123x60E10A5yzz
This is similar in form to Eq. (3), where RSEC is used to represent the
characteristic impedance of the SAC™. However, in this case a real
R on the primary side of the SAC is effectively scaled by K2 with
respect to the secondary.
Assuming that R = 1Ω, the effective R as seen from the secondary
side is 28mΩ, with K = 1/6 .
A similar exercise should be performed with the additon of a
capacitor or shunt impedance at the primary of the SAC. A switch
in series with VPRI is added to the circuit. This is depicted in
Figure 21.
S
VVPiRnI
+
–
C
SSAACC™
KK==11/3/62
VVSEoCut
Figure 21 — Sine Amplitude Converter with primary capacitor
A change in VPRI with the switch closed would result in a change in
capacitor current according to the following equation:
Low impedance is a key requirement for powering a high-
current, low-voltage load efficiently. A switching regulation stage
should have minimal impedance while simultaneously providing
appropriate filtering for any switched current. The use of a SAC
between the regulation stage and the point of load provides a
dual benefit of scaling down series impedance leading back to
the source and scaling up shunt capacitance or energy storage
as a function of its K factor squared. However, the benefits are
not useful if the series impedance of the SAC is too high. The
impedance of the SAC must be low, i.e. well beyond the crossover
frequency of the system.
A solution for keeping the impedance of the SAC low involves
switching at a high frequency. This enables small magnetic
components because magnetizing currents remain low. Small
magnetics mean small path lengths for turns. Use of low loss core
material at high frequencies also reduces core losses.
The two main terms of power loss in the BCM module are:
n No load power dissipation (PPRI_NL): defined as the power
used to power up the module with an enabled powertrain
at no load.
n Resistive loss (PRSEC): refers to the power loss across
the BCM module modeled as pure resistive impedance.
Pdissipated= PPRI_NL + PRSEC
(10)
Therefore,
Ic (t) = C dVdPtRI
(7)
Assume that with the capacitor charged to VPRI, the switch is
opened and the capacitor is discharged through the idealized SAC.
In this case,
Ic= ISEC • K
(8)
substituting Eq. (1) and (8) into Eq. (7) reveals:
ISEC =
C
K2 •
dVSEC
dt
(9)
PSEC_OUT = PPRI_IN – Pdissipated = PPRI_IN – PPRI_NL – PRSEC (11)
The above relations can be combined to calculate the overall
module efficiency:
h=
PSEC_OUT = PPRI_IN – PPRI_NL – PRSEC
PPRI_IN
PPRI_IN
(12)
= VPRI • IPRI – PPRI_NL – (ISEC)2 • RSEC
VPRI • IPRI
The equation in terms of the secondary has yielded a K2 scaling
factor for C, specified in the denominator of the equation.
A K factor less than unity results in an effectively larger capacitance
on the secondary when expressed in terms of the primary. With a
K = 1/6 as shown in Figure 21, C = 1µF would appear as
C = 36µF when viewed from the secondary.
( ) = 1 – PPRI_NL + (ISEC)2 • RSEC
VPRI • IPRI
BCM® Bus Converter
Page 24 of 29
Rev 1.2
07/2016
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