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DCM48AP150T320A50 Datasheet, PDF (21/25 Pages) Vicor Corporation – Regulated DC Converter
Figure 21 shows a scenario where there is no bottom side cooling.
In this case, the heat flow path to the bottom is left open and the
equations now simplify to:
TINT – PD1 • ΦINT-TOP = TCASE_TOP
TINT – PD3 • ΦINT-LEADS = TLEADS
PDTOTAL = PD1 + PD3
Power Dissipation (W)
Thermal Resistance Top
ΦINT-TOP°C / W
Thermal Resistance Bottom
ΦINT-BOTTOM°C / W
TCASE_BOTTOM(°C)
MAX INTERNAL TEMP
Thermal Resistance Leads
ΦINT-LEADS°C / W
TLEADS(°C)
TCASE_TOP(°C)
+
–
Figure 22 — One side cooling thermal model
Figure 22 shows a scenario where there is no bottom side and leads
cooling. In this case, the heat flow path to the bottom is left open and
the equations now simplify to:
TINT – PD1 • ΦINT-TOP = TCASE_TOP
PDTOTAL = PD1
Vicor provides a suite of online tools, including a simulator and
thermal estimator which greatly simplify the task of determining
whether or not a DCM thermal configuration is sufficient for a given
condition. These tools can be found at:
www.vicorpower.com/powerbench.
Array Operation
A decoupling network is needed to facilitate paralleling:
n An output inductor should be added to each DCM, before the
outputs are bussed together to provide decoupling.
n Each DCM needs a separate input filter, even if the multiple DCMs
share the same input voltage source. These filters limit the ripple
current reflected from each DCM, and also help suppress
generation of beat frequency currents that can result when
multiple powertrains input stages are permitted to
direclty interact.
If signal pins (TR, EN, FT) are not used, they can be left floating, and
DCM will work in the nominal output condition.
When common mode noise in the input side is not a concern, TR and
EN can be driven and FT received using a single Kelvin connection to
the shared -IN as a reference.
An example of DCM paralleling circuit is shown in Figure 23.
Recommended values to start with:
L1_x: 1 uH, minimized DCR;
R1_x: 0.3 Ω;
C1_x: Ceramic capacitors in parallel, C1 = 20 µF;
L2_x: L2 ≥ 0.15 uH;
C3_x: electrolytic or tantalum capacitor, 1000 uF ≤ C3 ≤10000 uF;
C4, C5: additional ceramic /electrolytic capacitors, if needed for
DCM™ DC-DC Converter
Page 21 of 25
Rev 1.1
07/2015
DCM48AP150x320A50
output ripple filtering;
In order to help sensitive signal circuits reject potential noise,
additional components are recommended:
R2_x: 301 Ohm, facilitate noise attenuation for TR pin;
FB1_x, C2_x: FB1 is a ferrite bead with an impedance of at least 10 Ω
at 100MHz. C2_x can be a ceramic capacitor of 0.1uF. Facilitate noise
attenuation for EN pin.
R1_1
+IN
F 1_1
L1_1
C1_1
-IN
F 1_2
R1_2
L1_2
C1_2
≈≈
F 1_8
R1_8
L1_8
C1_8
Shared -IN Kelvin
VTR VEN
R2_1
FB1_1
C2_1
DCM1
TR
EN
FT
+IN
+OUT
R2_2
FB1_2
C2_2
-IN
-OUT
DCM2
TR
EN
FT
+IN
+OUT
≈≈ ≈
R2_8
FB1_8
C2_8
R3
R4
D1
-IN
-OUT
DCM8
TR
EN
FT
+IN
+OUT
-IN
-OUT
L2_1
C3_1
+OUT
C4
C5
-OUT
L2_2
C3_2
≈≈
L2_8
C3_8
Figure 23 — DCM paralleling configuration circuit 1
When common mode noise rejection in the input side is needed,
common modes choke can be added in the input side of each DCM.
An example of DCM paralleling circuit is shown below:
R1_1
+IN
F 1_1
L1_1
C1_1
-IN
F 1_2
R1_2
L1_2
C1_2
≈≈
F 1_8
R1_8
L1_8
C1_8
+
VTR1
R2_1
+ FB1_1
VEN1
C2_1
R3_1
__
R4_1
D1_1
+
VTR2
R2_2
+ FB1_2
C2_2
VEN2
R3_2
__
R4_2
D1_2
DCM1
TR
EN
FT
+IN
+OUT
-IN
-OUT
DCM2
TR
EN
FT
+IN
+OUT
-IN
-OUT
+
VTR8
R2_8
+ FB1_8
C2_8
VEN8
R3_8
__
R4_8
D1_8
DCM8
TR
EN
FT
+IN
+OUT
-IN
-OUT
L2_1
C3_1
+OUT
C4
C5
-OUT
L2_2
C3_2
≈≈
L2_8
C3_8
Figure 24 — DCM paralleling configuration circuit 2
Notice that each group of control pins need to be individually driven
and isolated from the other groups control pins. This is because -IN
of each DCM can be at a different voltage due to the common mode
chokes. Attempting to share control pin circuitry could lead to
incorrect behavior of the DCMs.
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