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PI3311-21-LGIZ Datasheet, PDF (20/26 Pages) Vicor Corporation – 8V to 36Vin, 15A Cool-Power ZVS Buck Regulator
Variable Frequency Operation
Each PI33XX-X1 is preprogrammed to a base
operating frequency, with respect to the power
stage inductor (see Table 5), to operate at peak
efficiency across line and load variations. At low line
and high load applications, the base frequency will
decrease to accommodate these extreme operating
ranges. By stretching the frequency, the ZVS
operation is preserved throughout the total input
line voltage range therefore maintaining optimum
efficiency.
Parallel Operation
Paralleling modules can be used to increase the
output current capability of a single power rail and
reduce output voltage ripple.
Vin
Vin
L1
VS1
Cin
PGND
Vout
Cout
ZVS Buck
R1
SYNCO(#2)
PGD (#1) REM
SYNCI
SYNCI(#2)
SYNCO
EN(#2)
EN
EAO(#2)
EAO
TRK(#2)
TRK
SGND
Vout
Vin
Vin
L1
VS1
Cin
PGND
Vout
Cout
ZVS Buck
SYNCO(#1)
PGD (#2) REM
SYNCI
To R1
SYNCO
EN(#1)
EN
EAO(#1)
EAO
TRK(#1)
TRK
SGND
Figure 3 - PI33XX-X1 parallel operation
By connecting the EAO pins and SGND pins of each
module together the units will share the current
equally. When the TRK pins of each unit are
connected together, the units will track each other
during soft-start and all unit EN pins have to be
released to allow the units to start (See Figure 3).
Also, any fault event in any regulator will disable the
other regulators. The two regulators will be out of
phase with each other reducing output ripple (refer
to Switching Frequency Synchronization).
To provide synchronization between regulators over
the entire operational frequency range, the Parallel
Good (PGD) pin must be connected to the lead
regulator’s (#1) SYNCI pin and a 2.5kΩ Resistor, R1,
must be placed between SYNCO (#2) return and the
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PI33XX-X1
lead regulator’s SYNCI (#1) pin, as shown in Figure 3.
In this configuration, at system soft-start, the PGD
pin pulls SYNCI low forcing the lead regulator to
initialize the open-loop startup synchronization.
Once the regulators reach regulation, SYNCI is
released and the system is now synchronized in a
closed-loop configuration which allows the system to
adjust, on the fly, when any of the individual
regulators begin to enter variable frequency mode in
the loop.
Multi-phasing three regulators is possible (PI33XX-21
only) with no change to the basic single-phase
design. For more information about how to program
phase delays within the regulator, please refer to
Picor application note PI33XX-2X Multi-Phase Design
Guide.
I2C Interface Operation
PI33XX-21 devices provide an I2C digital interface
that enables the user to program the EN pin polarity
(from high to low assertion) and switching frequency
synchronization phase/delay. These are one time
programmable options to the device.
Also, the PI33XX-21 devices allow for dynamic Vout
margining via I2C that is useful during development
(settings stored in volatile memory only and not
retained by the device). The PI33XX-21 also have the
option for fault telemetry including:
 Over temperature protection
 Fast/Slow current limit
 Output voltage high
 Input overvoltage
 Input undervoltage
For more information about how to utilize the I2C
interface please refer to Picor application note
PI33XX-2X I2C Digital Interface Guide.
Rev 1.3
09/2015
Cool-Power®
Page 20 of 26