PRD48BF480T400A00 Datasheet, PDF (16/22 Pages) Vicor Corporation – PRM™ Regulator

Not Recommended for New Designs
PRM48BF480T400A00
(Formerly VIP0001TFJ)
VTM Control (VC) pin supplies an initial V_CC voltage to
downstream VTMs, enabling them and synchronizing their
startup with the PRM. The V_CC voltage is a pulse, typically
10ms duration at 14V.
If VC is not loaded by a VTM, it must be terminated with a
1kresistor to –VOut.
Primary Control (PC) is both an input and an output. It
can provide the following features:
• Delayed start: upon application of voltage (>UVLO) to the
module power input and after T_OFF, the PC pin will source
a constant 90μA current.
• Output disable: PC may be pulled down externally in
order to disable the module. Pull down resistance should
be less than 300 Ω to SG.
• Fault detection flag: The PC 5 V voltage source is
internally turned off when a fault condition is latched. Note
that aside from the Short Circuit fault condition, PC does
not have significant current sinking capability. Therefore in
the case of an array of PRMs with interconnected PC pins,
PC does not in general reflect the fault state of all PRMs.
The common PC line will not disable neighboring modules
when a fault is detected except for a latched Output Short
Circuit fault. Conversely any unit in the array latching a
Short Circuit fault will disable the array for T_SCR.
Signal Ground (SG) pin provides a Kelvin connection to
the PRM’s internal signal ground. It should be used as the
reference for PR, TM, IF, and should return all PC, VS and
RE pin currents. In array configurations with common
ground control circuits, a series resistor (~1) is
recommended in order to decouple power and signal
current returns.
10.2 Control circuit requirements and design procedure
The PRM48BF480T400A00 is an intelligent powertrain
module designed to fully exploit external output voltage
feedback and current sensing sub-circuits. These two
external circuits are illustrated in Figure 26, which shows
an example of the PRM in a standalone application with
local voltage feedback and high side current sensing.
In general, these circuits include a precision voltage
reference, an operational amplifier which provides closed
loop feedback compensation, and a high side current
sense circuit which includes a shunt and current sense IC.
The following design procedures refer to the circuit shown
in Figure 26.
10.2.1 Setting the output voltage level
Temperature Monitor (TM) pin outputs a voltage
proportional to the absolute temperature of the converter
analog control IC. It can be used to accomplish the
following functions:
• Monitor the control IC temperature: The gain and setpoint
of TM are such that the temperature, in Kelvin, of the PRM
controller IC is equal to the voltage on the TM pin scaled
by 100. (i.e. 3.0 V = 300 K = 27ºC).
• Closed loop thermal management at the system level
(e.g. variable speed fans or coolant flow)
• Fault detection flag: The TM voltage source is turned off
as soon as a fault is detected. For system monitoring
purposes (microcontroller interface) faults are detected on
falling edges of TM.
Reference Enable (RE) pin outputs a regulated 3.3V,
8mA voltage source. It is enabled only after successful
startup of the PRM powertrain (see chapters 5.0 and 6.0.)
RE is intended to power the output current transducer and
also the voltage reference for the control loop. Powering
the reference generator with RE helps provide a controlled
startup, since the output voltage of the system is able to
track the reference level as it comes up.
Voltage Source (VS) pin outputs a gated (e.g. mirrors PC
status), non-isolated, regulated 9V, 5mA voltage source. It
can be used to power external control circuitry; it always
leads RE.
The output voltage setpoint is a function of the voltage
reference and the output voltage sense ratio. With
reference to Fig. 26, R1 and R2 form the output voltage
sensing divider which provides the scaled output voltage
to the negative input of the error amplifier; a dedicated
reference IC provides the reference voltage to the positive
input of the error amplifier. Under normal operation, the
error amplifier will keep the voltages at the inverting and
non-inverting inputs equal, and therefore the output
voltage is defined by:
V_OUT
 V_ref

R1 R2
R2
Note that the component R1 will also factor into the
compensation as described in a later section.
It is important to apply proper slew rate to the reference
voltage rise when the control loop is initially enabled. The
recommended range for reference rise time is 1 ms to 9
ms. The lower rise time limit will ensure optimized
modulator timing performance during startup, and to allow
the current limit feature (through IF pin) to fully protect the
device during power-up. The upper rise time limit is
needed to guarantee a sufficient factorized bus voltage is
provided to any downstream VTM input before the end of
the VC pulse.
V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200
Rev. 1.2
07 / 2012
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