PI3106-01-HVIZ_16 Datasheet, PDF (15/18 Pages) Vicor Corporation – Cool-Power ZVS Isolated DC-DC Converter Modules

Functional Description
Figure 21 — Picor PI31xx-01-HVIZ Shown With System Fuse, Filter,
Decoupling And Extended Soft Start
Input Power Pins IN(+) and IN(-)
The input power pins on the PI31xx-01-HVIZ are connected to the
input power source which can range from 18 V to 36 V DC.
Under surge conditions, the PI31xx-01-HVIZ can withstand up to 45
V DC for 100 ms without incurring damage. The user should take
care to avoid driving the input rails above the specified ratings. Since
the PI31xx-01-HVIZ is designed with high reliability in mind, the
input pins are continuously monitored. If the applied voltage
exceeds the input over-voltage trip point, the conversion process
shall be terminated immediately. The converter initiates soft-start
automatically within 80ms after the input voltage is reduced back to
the appropriate value. The input pins do not have reverse polarity
protection. If the PI31xx-01-HVIZ is operated in an environment
where reverse polarity is a concern, the user should consider using a
polarity protection device such as a suitably rated diode. To avoid the
high losses of using a diode, the user should consider the much
higher efficiency Picor family of intelligent Cool-ORing® solutions
that can be used in reverse polarity applications. Information is
available at vicorpower.com.
The PI31xx-01-HVIZ will draw nearly zero current until the input
voltage reaches the internal start up threshold. If the ENABLE pin is
not pulled low by external circuitry, the output voltage will begin
rising to its final output value about 80ms after the input UV lockout
releases. This will occur automatically even if the ENABLE pin is
floating.
To help keep the source impedance low, the input to the
PI31xx-01-HVIZ should be bypassed with (2) 4.7 uF 50 V ceramic
capacitors of X7R dielectric in parallel with a low Q 100 uF 50 V
electrolytic capacitor. To reduce EMI and reflected ripple current, a
series inductor of 0.2 to 0.47 uH can be added. The input traces to the
module should be low impedance configured in such a manner as to
keep stray inductance minimized.
ENABLE
The ENABLE pin serves as a multi-function pin for the
PI31xx-01-HVIZ. During normal operation, it outputs the on-board
4.9 V regulator which can be used for trimming the module up. The
ENABLE pin can also be used as a remote enable pin either from the
secondary via an optocoupler and some external isolated bias supply
or from the primary side through a small signal transistor, FET or
any device that sinks 3.3 mA, minimum. If the ENABLE pin is lower
than 2.35 V typical, the converter will be held off or shut down if
already operating. A third feature is offered in that during a fault
condition such as output OVP, input UV or OV, or output current
limit, the ENABLE pin is pulled low internally. This can be used as a
signal to the user that a fault has occurred. Whenever the ENABLE
pin is pulled low, the TRIM/SS pin follows, resetting the internal and
external soft-start circuitry. All faults will pull ENABLE low including
Cool-Power®
Page 15 of 18
Rev 1.4
02/2015
PI31xx-01-HVIZ
over temperature. If increased turn on delay is desired, the ENABLE
pin can be bypassed with a small capacitor up to a
maximum of 1500 pF.
TRIM/SS Pin
The TRIM/SS pin serves as another multi-purpose pin. First, it is used
as the reference for the internal error amplifier. Connecting a resistor
from TRIM/SS to SGND allows the reference to be margined down by
as much as -20%. Connecting a resistor from TRIM/SS to ENABLE
will allow the reference and output voltage to be margined up by
10%. If the user wishes a longer start up time, a small ceramic
capacitor can be added to TRIM/SS to increase it. It is critical to
connect any device between TRIM/SS and SGND and not -IN,
otherwise high frequency noise will be introduced to the reference
and possibly cause erratic operation. Referring to the figures below,
the appropriate trim up or trim down resistor can be calculated using
the equivalent circuit diagram and the equations. When trimming
up the trim down resistor is not populated and when trimming
down, the trim up resistor is not populated. The soft start time is
adjustable within the limits defined by the data tables and has a
default value of 500us to reach steady state. The internal soft start
capacitor value is 10nF.
ENABLE
PI31xx
VERO
10k
RSS
TRIM/SS
Vref
•
SGND
Rhigh
•
Rlow
•
R
( ) _{( )} ^R_low ⁼
–V_desired
•
INT
–Vout_nom + V_desired
( ) ^{( )} R =
[( ) + ] ^high
–RSS
•
–Vout
nom
•
V+
ERO
V
desired
•
V
ref
V_ref –Vout_nom
V
desired
Figure 22 — Trim Equations And Equivalent Circuit
C = ^{Tssdesired – 230 • 10−6}
REF
23000
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