PRM48BH480T250A00 Datasheet, PDF (1/44 Pages) Vicor Corporation – PRM™ Regulator

PRM48BH480 X 250A00
PRM™ Regulator
FEATURES
 48V input (38V to 55V), non‐isolated ZVS buck‐boost regulator
 20V to 55V adjustable output range
 250W output power in 0.57in² footprint
 96.7% typical efficiency, at full load
 1670 W/in³ (102 W/cm³) Power Density
 5.28 MHrs MTBF (MIL‐HDBK‐217Plus Parts Count)
 Pin selectable operating mode
 Adaptive Loop
 Remote Sense / Slave
 Half VIChip Package
 22.0mm x 16.5mm x 6.73mm
TYPICAL APPLICATIONS
 High Density Power Supply DC-DC rail outputs
 High Density ATE system DC-DC power
 Telecom NPU and ASIC core power
 Communications Systems
 Non-isolated and isolated power converters
PRODUCT RATINGS
V_IN = 38V to 55V
V_OUT= 48V
(20V to 55V Trim)
P_OUT = 250W
I_OUT = 5.21A
DESCRIPTION
The VIChip™ PRM™ Regulator is a high efficiency converter, operating from a 38 to 55 Vdc input to generate a regulated
20 to 55 Vdc output. The ZVS buck – boost topology enables high switching frequency (~1.03 MHz) operation with high
conversion efficiency. High switching frequency reduces the size of reactive components enabling power density up to
1670 W/in³.
The Half VIChip package is compatible with standard pick-and-place and surface mount assembly processes with a planar
thermal interface area and superior thermal conductivity.
In a Factorized Power Architecture™ system, the PRM and downstream VTM™ current multiplier minimize distribution and
conversion losses in a high power solution, providing an isolated, regulated output voltage.
The PRM48BH480[x]250A00 has two selectable modes of regulation depending on the application requirements.
In Adaptive Loop operation, the PRM48BH480[x]250A00 utilizes a unique feed-forward scheme that enables precise regulation
of an isolated POL voltage without the need for remote sensing and voltage feedback.
In Remote Sense operation, the internal regulation circuitry is disabled, and an external control loop and current sensor
maintain regulation. This affords flexibility in the design of both voltage and current compensation loops to optimize
performance in the end application.
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Rev. 1.0
11/2012