CD-700 Datasheet, PDF (11/14 Pages) List of Unclassifed Manufacturers – Complete VCXO Based Phase Lock Loop

CD-700, VCXO Based PLL
60k 1.0uF 90k 10k
19.440 MHz (pin 5)
÷16
pin 6
pin 3
∅
pin 15
pin 2
pin 1
pin16
VCXO
pin 13
CD-700
pin 11
÷8
19.440 MHz
2.430 MHz
3.3 V
10k, 2.2uF , 10k
Figure 11. 19.440 MHz Clock Smoothing
Table 5. Reflow Profile (IPC/JEDEC J-STD-020C)
Parameter
Symbol
PreHeat Time
t_S
Ramp Up
Time Above 217 ^oC
Time To Peak Temperature
Time At 260 ^oC
Ramp Down
R _UP
t_L
t _AMB-P
t_P
R _DN
Value
60 sec Min, 180 sec Max
3 ^oC/sec Max
60 sec Min, 150 sec Max
480 sec Max
20 sec Min, 40 sec Max
6 ^oC/sec Max
The device has been qualified to meet the JEDEC
260
standard for Pb-Free assembly. The temperatures
and time intervals listed are based on the Pb-Free
R _UP
small body requirements. The temperatures refer to
the topside of the package, measured on the
217
200
package body surface. The CD-700 device is
hermetically sealed so an aqueous wash is not an
150
issue.
t_S
t _AMB-P
t_L
t_P
R _DN
25
Figure 12. Suggested IR profile
Time (sec)
Vectron International, 267 Lowell Rd, Hudson NH 03051-4916
Page 11 of 14
Tel: 1-88-VECTRON-1 • Web: www.vectron.com
Rev : 06Apr08