UMC33167L-TA5-T Datasheet, PDF (7/8 Pages) Unisonic Technologies – LINEAR INTEGRATED CIRCUIT

UMC33167
Advance
LINEAR INTEGRATED CIRCUIT
 APPLICATION INFORMATION
The UTC UMC33167 series are monolithic power switching regulators that are optimized for dc-to-dc converter
applications. These devices operate as fixed frequency, voltage mode regulators containing all the active functions
required to directly implement step-down and voltage-inverting converters with a minimum number of external
components. They can also be used cost effectively in step-up converter applications. Potential markets include
automotive, computer, industrial, and cost sensitive consumer products. A description of each section of the device
is given below with the representative block diagram shown in Figure 1.
Oscillator
The oscillator frequency is internally programmed to 72kHz by capacitor C_T and a trimmed current source. The
charge to discharge ratio is controlled to yield a 95% maximum duty cycle at the Switch Output. During the discharge
of C_T, the oscillator generates an internal blanking pulse that holds the inverting input of the AND gate high, disabling
the output switch transistor. The nominal oscillator peak and valley thresholds are 4.1V and 2.3V respectively.
Pulse Width Modulator
The Pulse Width Modulator consists of a comparator with the oscillator ramp voltage applied to the noninverting
input, while the error amplifier output is applied into the inverting input. Output switch conduction is initiated when C_T
is discharged to the oscillator valley voltage. As C_T charges to a voltage that exceeds the error amplifier output, the
latch resets, terminating output transistor conduction for the duration of the oscillator ramp-up period. This
PWM/Latch combination prevents multiple output pulses during a given oscillator clock cycle. Figures 2 illustrate the
switch output duty cycle versus the compensation voltage.
Error Amplifier and Reference
A high gain Error Amplifier is provided with access to the inverting input and output. This amplifier features a
typical dc voltage gain of 80dB, and a unity gain bandwidth of 600kHz with 70 degrees of phase margin. The
noninverting input is biased to the internal 5.05V reference and is not pinned out. The reference has an accuracy of
±2.0% at room temperature. To provide 5.0V at the load, the reference is programmed 50mV above 5.0V to
compensate for a 1.0% voltage drop in the cable and connector from the converter output. If the converter design
requires an output voltage greater than 5.05V, resistor R1 must be added to form a divider network at the feedback
input as shown in Figures 1 and 3. The equation for determining the output voltage with the divider network is:
V_OUT=5.05(R₂/R₁+1)
External loop compensation is required for converter stability. A simple low-pass filter is formed by connecting a
resistor (R₂) from the regulated output to the inverting input, and a series resistor-capacitor (R_F, C_F) between Pins 1
and 5. The compensation network component values shown in each of the applications circuits were selected to
provide stability over the tested operating conditions. The step-down converter (Figure 3) is the easiest to
compensate for stability. The simplest way to optimize the compensation network is to observe the response of the
output voltage to a step load change, while adjusting RF and C_F for critical damping. The final circuit should be
verified for stability under four boundary conditions. These conditions are minimum and maximum input voltages,
with minimum and maximum loads.
By clamping the voltage on the error amplifier output (Pin 5) to less than 150mV, the internal circuitry will be
placed into a low power standby mode, reducing the power supply current to 36A with a 12V supply voltage.
The Error Amplifier output has a 100 A current source pull-up that can be used to implement soft-start.
Switch Output
The output transistor is designed to switch a maximum of 40V, with a minimum peak collector current of 5.5A.
When configured for step-down or voltage-inverting applications, as in Figures 3, the inductor will forward bias the
output rectifier when the switch turns off. Rectifiers with a high forward voltage drop or long turn on delay time should
not be used. If the emitter is allowed to go sufficiently negative, collector current will flow, causing additional device
heating and reduced conversion efficiency. shows that by clamping the emitter to 0.5V, the collector current will be in
the range of 100A over temperature. A 1N5825 or equivalent Schottky barrier rectifier is recommended to fulfill these
requirements.
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
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