 English |
|
|
|
|
|
|
|
| UPSR1103 Datasheet, PDF (6/8 Pages) Unisonic Technologies – HIGH PRECISION CC/CV PRIMARY SIDE SWITCHING REGULATOR | |||
| |||
| ◁ |
UPSR1103
Advance
ï® OPERATION DESCRIPTION(Cont.)
CMOS IC
Figure3. Adjustable output power by changing Rcs
Figure4. Secondary current waveform
In CC operation, the CC loop control function of UTC UPSR1103 will keep a fixed proportion between secondary
inductance de-magnetization time (Tdemag) and switching cycle time (Tsw). The fixed proportion is
Tdemag
Tsw
=
1
2
(2)
Thus the output current is given by:
Iout
=
1
2
Ã
NP
NS
ÃIpk Ã
Tdemag
Tsw
=
1
4
Ã
NP
NS
ÃIpk
(3)
Programmable Cable Drop Compensation
UTC UPSR1103 has a built-in cable voltage drop compensation to achieve good load regulation. An offset voltage
is generated at VS pin by an internal current flowing into the resistor divider. The current is inversely proportional to
the voltage of COMR pin. As a result, it is inversely proportional to the output load current. The voltage drop across
the cable is compensated by this offset voltage at VS pin. It can also be programmed by adjusting the resistance of
the divider to compensate the drop for various cable lines used.
Current Sensing and Leading Edge Blanking
Cycle-by-cycle current limiting is offered in UTC UPSR1103. The switch current is detected by a sense resistor
into the CS pin. When the power switch is turned on, a turn-on spike will occur on this resistor. A 500ns leading-edge
blanking is built in to avoid false-termination of the switching pulse so that the external RC filtering is no longer
needed.
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
6 of 8
QW-R502-961. a
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese