83CXXX_15 Datasheet, PDF (4/5 Pages) Unisonic Technologies – CMOS IC

83CXXX
Preliminary
CMOS IC
 DETAILED DESCRIPTION
The UTC 83CXXX have a push-pull output stage. A microprocessor’s (µP’s) reset input initiates the
microprocessor in a known state. The UTC 83CXXX assert a reset signal as long as the V_CC power supply voltage
drops below a preset threshold. When V_CC has risen over the reset threshold, the devices keep the signal for at least
140ms. They have a function of preventing code-execution errors during power-up, power-down, or brownout
conditions by resetting.
See the manual reset input section if you want to see function that the manual reset input ( MR ) can initiate a
reset.
Manual Reset Input
Many products based on microprocessor need manual reset characteristic, allowing them to initiate a reset.
Reset keeps working while MR is low, and when MR returns high it is for the reset Active Timeout Period (t_RP).
TTL or CMOS-logic levels, or with open-drain / collector outputs both can drive MR . MR will be started by a logic low
on manual reset .Because the input has a build-in 20kΩ pull-up resistor; it can be left open if it is not used. We can
put a 0.1µF capacitor from MR to ground if MR is driven from long cables or the device is used in a noisy
environment strengthening additional noise capacity. Connecting a normally open momentary switch from MR to
ground to create a manual-reset function, and external debounce circuitry is not required.
V_CC
UTC
83CXXX
GND
RESET
R1=
100K
Figure 1. RESET Valid to V_CC = Ground Circuit
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
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QW-R502-353.c