LADLD10 Datasheet, PDF (2/7 Pages) Unisonic Technologies – 0.8V REFERENCE ULTRA LOW DROPOUT LINEAR REGULATOR

LXXLD10
Preliminary
 MARKING INFORMATION
PACKAGE
VOLTAGE CODE
HSOP-8
AD: ADJ
MARKING
 PIN CONFIGURATION
CMOS IC
 PIN DESCRIPTION
PIN NO.
1
2
3
4
5
6
7
8
PIN NAME
GND
FB
V_OUT
V_IN
V_CNTL
POK
EN
DESCRIPTION
Ground pin.
There’s an external resistor divider connected to this pin which is necessary to give
the feedback voltage to the regulator. The external circuit is combined as the follow:
between V_OUT and FB is R1(connected with a bypass capacitor which can improve
the load transient response),and between FB and ground is R2.The value of R2 and
R1 are recommended between 100Ω~10kΩ.So the output voltage is equals:
V_OUT=0.8·(1+
R1
R2
)(V)
The output voltage pin of the regulator. There should be set an output capacitor to
compensate for closed-loop and also to improve transient responses. It’s necessary
to connect Pin 3 and Pin 4 together by wide tracks.
This pin is the main supply input.
It’s necessary to connect the Exposed Pad and V_IN together for lower dropout
voltage. Monitoring this pin’s voltage can reset Power-On.
Power input pin of the control circuitry. Connecting this pin to a +5V (recommended)
supply voltage provides the bias for the control circuitry. The voltage at this pin is
monitored for Power-On Reset purpose.
Output pin for Power-OK signal output.
Being an open drain output, through senescing FB voltage, this pin can show the
users the output voltage’s states. That’s this pin will be low under any of these two
situations: the rising FB voltage is not above the V_POK threshold; the falling FB
voltage is below the V_PNOK threshold. That indicates the output voltage is not ready
for users.
Input Enable control pin. The output voltage can be shut down when this pin is
below 0.3V. This pin’s voltage can be set higher than V_CNTL voltage by an internal
10μA current source, and then the regulator will begin working normally.
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
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QW-R502-702.b