US1260 Datasheet, PDF (4/9 Pages) UNISEM – DUAL 6A AND 1A LOW DROPOUT POSITIVE ADJUSTABLE REGULATOR

US1260
APPLICATION INFORMATION
Introduction
The US1260 is a dual adjustable Low Dropout (LDO)
regulator packaged in a 7 pin TO220 which can easily
be programmed with the addition of two external resis-
tors to any voltages within the range of 1.20 to 5.5 V.
This voltage regulator is designed specifically for appli-
cations that require two separate regulators such as the
Intel PII processors requiring 1.5V and 2.5 V supplies,
eliminating the need for a second regulator which
results in lower overall system cost. When Vctrl pin
is connected to a supply which is at least 1V higher
than Vin, the dropout voltage improves by 30% which
makes it ideal for applications requiring less than the
standard 1.3V dropout given in the LDO products such
as US10XX series. The US1260 also provides an accu-
rate 1.20V voltage reference common to both regulators
for programming each output voltage. Other features of
the device include; fast response to sudden load current
changes, such as GTL+ termination application for
Pentium II ™ family of microprocessors. The US1260
also includes thermal shutdown protection to protect the
device if an overload condition occurs.
Output Voltage Setting
The US1260 can be programmed to any voltages in the
range of 1.20V to 5.5V with the addition of R1 and R2
external resistors according to the following formula:
VOUT
=
VREF^{}1 +
R2 
R1
+ R2 × IB
Wehre : VREF = 1.20V Typically
IB = 0.02uA Typical
R1 & R2 as shown in figure 2
Vin
Vctrl
Vin
Vout
US1260
R2
Ib
Vctrl
Vfb
Gnd
Vref R1
Vout
1260app2-1.0
The US1260 keeps a constant 1.20V between the Vfb
pin and ground pin. By placing a resistor R1 across these
two pins a constant current flows through R1, adding to
the IFB current and into the R2 resistor producing a volt-
age equal to the (1.2/R1)*R2 + IFB* R2 which will be added
to the 1.20V to set the output voltage as shown in the
above equation. Since the input bias current of the am-
plifier (IFB) is only 0.02uA typically , it adds a very small
error to the output voltage and for most applications can
be ignored. For example, in a typical 1.5V
GTL+application if R1=10.2kΩ and R2=2.55kΩ the error
due to the Iadj is only 0.05mV which is less than 0.004%
of the nominal set point. The effective input imped-
ance seen by the feedback pins (R1 II R2) must al-
ways be higher than 1.8kΩ in order for the regula-
tor to start up properly.
Load Regulation
Since the US1260 does not provide a separate ground
pin for the reference voltage, it is not possible to provide
true remote sensing of the output voltage at the load.
Figure 3 shows that the best load regulation is achieved
when the bottom side of R1 resistor is connected di-
rectly to the ground pin of US1260 (preferably to the tab
of the device) and the top side of R2 resistor is con-
nected to the load. In fact , if R1 is connected to the load
side, the effective resistance between the regulator and
the load is gained up by the factor of (1+R2/R1) ,or the
effective resistance will be ,Rp(eff)=Rp*(1+R2/R1).It is
important to note that for high current applications, this
can represent a significant percentage of the overall load
regulation and one must keep the path from the regula-
tor to the load as short as possible to minimize this
effect.
Vin
Vin
Vout
US1260
R2
Vctrl
Vctrl
Vfb
Gnd
RL
R1
Rp
PARASITIC LINE
RESISTANCE
1260app3-1.1
Figure 2 - Typical application of the US1260 for
programming the output voltage.
(Only one output is shown here)
Figure 3 - Schematic showing connection for best load
regulation. (Only one output is shown here)
3-4
Rev. 1.9
3/22/99