UM2002 Datasheet, PDF (8/12 Pages) Union Semiconductor, Inc. – Bidirectional voltage level translator for open-drain and push-pull applications

UM2002
1.8V
1.5V
1.2V
1.0V
VCORE
CPU I/O
VREFA
UM20XX
200kΩ
EN
VREFB
A1
SW
B1
A2
SW
B2
A3
SW
B3
A4
SW
B4
A5
SW
B5
A6
SW
B6
5V
totem pole or
open-drain I/O
VCC
CHIPSET I/O
3.3V
VCC
CHIPSET I/O
An
SW
Bn
GND
Fig 4. Bidirectional translation to multiple higher voltage levels
Bidirectional translation
For the bidirectional clamping configuration (higher voltage to lower voltage or lower voltage to
higher voltage), the EN input must be connected to VREFB and both pins pulled to HIGH side
V_pu(D) through a pull-up resistor (typically 200kΩ). This allows VREFB to regulate the EN input.
A filter capacitor on VREFB is recommended. The master output driver can be totem pole or
open-drain (pull-up resistors may be required) and the slave device output can be totem pole or
open-drain (pull-up resistors are required to pull the Bn outputs to V_pu(D)). However, if either
output is totem pole, data must be unidirectional or the outputs must be 3-stateable and be
controlled by some direction-control mechanism to prevent HIGH-to-LOW contentions in either
direction. If both outputs are open-drain, no direction control is needed.
The reference supply voltage (V_ref(A)) is connected to the processor core power supply voltage.
When VREFB is connected through a 200kΩ resistor to a 3.3V to 5.5V V_pu(D) power supply, and
V_ref(A) is set between 1.0V and (V_pu(D) −1V), the output of each An has a maximum output voltage
equal to VREFA, and the output of each Bn has a maximum output voltage equal to V_pu(D).
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http://www.union-ic.com Rev.04 Feb.2014
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