UM4501 Datasheet, PDF (6/12 Pages) Union Semiconductor, Inc. – Multi-line ESD/EMI Protections for Signal Lines

UM4501/4511/6501/8501/8511
Figure 2. Pin Identification & Configuration
(UM4501 Top View)
IN1 1
IN2 2
IN3 3
IN4 4
GND
8 OUT1
7 OUT2
6 OUT3
5 OUT4
Figure 3. Pin Identification & Configuration
(UM4511 Top View)
IN1 1
IN2 2
IN3 3
IN4 4
GND
8 OUT1
7 OUT2
6 OUT3
5 OUT4
Figure 4. Pin Identification & Configuration
(UM6501 Top View)
IN1 1
12 OUT1
IN2
OUT2
IN3
GND
IN4
OUT3
OUT4
IN5
OUT5
IN6
OUT6
Figure 5. Pin Identification & Configuration
(UM8501/UM8511 Top View)
IN1 1
16 OUT1
IN2
OUT2
IN3
OUT3
IN4
OUT4
GND
IN5
OUT5
IN6
OUT6
IN7
OUT7
IN8
OUT8
Pin
Identification
1-4
Input Lines
5-8
Output Lines
Center Tab
Ground
Equation 1: The Impedance of an Inductor at
Frequency XLF
XLF(L, f ) = 2×л×f ×L
Where:
L= parasitic inductance in the PCB (H);
f = frequency (Hz).
Pin
Identification
1-6
Input Lines
7-12
Output Lines
Center Tab
Ground
Equation 1: The Impedance of an Inductor at
Frequency XLF
XLF(L, f ) = 2×л×f ×L
Where:
L= parasitic inductance in the PCB (H)
f = frequency (Hz)
Pin
Identification
1-8
Input Lines
9-16
Output Lines
Center Tab
Ground
Equation 1: The Impedance of an Inductor at
Frequency XLF
XLF(L, f ) = 2×л×f ×L
Where:
L= parasitic inductance in the PCB (H)
f = frequency (Hz)
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