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UM5059T_16 Datasheet, PDF (3/5 Pages) Union Semiconductor, Inc. – Single Line ESD Protection Diode Array
UM5059T
Electrical Characteristics
(T=25°C, Device for 5.0V Reverse Stand-off Voltage)
Parameter
Symbol
Conditions
Reverse Stand-Off
Voltage
Reverse Breakdown
Voltage
Reverse Leakage
Current
VRWM
VBR
IR
IT=1mA
VRWM=5V, T=25°C
Clamping Voltage
IPP=5A, tP=8/20μs
VC
IPP=11A, tP=8/20μs
Forward Voltage
VF
IF=10mA
Junction Capacitance
CJ
VR=0V, f=1MHz
Junction Capacitance
CJ
VR=2.5V, f=1MHz
Min Typ Max Unit
5
V
6
6.8 7.8
V
0.1 μA
9.1
V
13
0.8
V
60
75
pF
40
50
pF
Applications Information
Device Connection Options
UM5059T ESD protection diode is designed to protect one data, I/O, or power supply line. The
device is unidirectional and may be used on lines where the signal polarity is above ground. The
cathode dot should be placed towards the line hat is to be protected.
Circuit Board Layout Recommendations for Suppression of ESD
Good circuit board layout is critical for the suppression of ESD induced transients. The following
guidelines are recommended:
1. Place the TVS near the input terminals or connectors to restrict transient coupling.
2. Minimize the path length between the TVS and the protected line.
3. Minimize all conductive loops including power and ground loops.
4. The ESD transient return path to ground should be kept as short as possible.
5. Never run critical signals near board edges.
6. Use ground planes whenever possible. For multilayer printed-circuit boards, use ground
vias.
7. Keep parallel signal paths to a minimum.
8. Avoid running protection conductors in parallel with unprotected conductor.
9. Minimize all printed-circuit board conductive loops including power and ground loops.
10. Avoid using shared transient return paths to a common ground point.
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http://www.union-ic.com Rev.05 Mar.2016
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