CHU3377_15 Datasheet, PDF (4/4 Pages) United Monolithic Semiconductors – W-band Multifunction: Multiplier / MPA

CHU3377
W-band Multiplier/MPA
Typical Assembly and Bias Configuration
-V
>= 47pF
DC lines
+V
>= 47pF
L_in
µ-strip line
L_out
µ-strip line
This drawing shows an example of assembly and bias configuration. All the transistors are internally
self biased. An external chip capacitor of at least 47pF is necessary for the positive and negative
supply voltages.
For the RF pads the equivalent wire bonding inductance (diameter=25µm) have to be according to the
following recommendation.
Pin name
Equivalent inductance
Wire length (1)
IN
OUT
L_in ≤ 0.3 nH
L_out ≤ 0.15 nH (2)
≤ 0.4 mm
0.2 mm (2)
(1) This value is the total length including the necessary loop from pad to pad.
(2) For longer wire length or higher inductance, an external compensation is required to match
50Ω between OUT Pin and 0.15nH wire inductance plan. (For example with a matching
network on the substrate)
Chip backside must be RF grounded.
Ordering Information
Chip form :
CHU3377-98F/00
Information furnished is believed to be accurate and reliable. However United Monolithic Semiconductors
S.A.S. assumes no responsibility for the consequences of use of such information nor for any infringement of
patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of United Monolithic Semiconductors S.A.S.. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all
information previously supplied. United Monolithic Semiconductors S.A.S. products are not authorised for use
as critical components in life support devices or systems without express written approval from United
Monolithic Semiconductors S.A.S.
Ref.: DSCHU33777082 - 23 Mar 07
4/4
Specifications subject to change without notice
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