SSM6N7002FU Datasheet, PDF (2/2 Pages) Toshiba Semiconductor – High Speed Switching Applications Analog Switch Applications

Product specification
SSM6N7002FU
Electrical Characteristics (Ta = 25°C) (Q1, Q2 Common)
Characteristics
Gate leakage current
Drain-Source breakdown voltage
Drain cut-off current
Gate threshold voltage
Forward transfer admittance
Drain-Source ON resistance
Input capacitance
Reverse transfer capacitance
Output capacitance
Switching time
Turn-on delay time
Turn-off delay time
Symbol
Test Condition
I_GSS
V _{(BR) DSS}
I_DSS
V_th
⎪Y_fs⎪
R_{DS (ON)}
C_iss
C_rss
C_oss
td_(on)
td_(off)
V_GS = ± 20 V, V_DS = 0
I_D = 0.1 mA, V_GS = 0
V_DS = 60 V, V_GS = 0
V_DS = 10 V, I_D = 0.25 mA
V_DS = 10 V, I_D = 200 mA
I_D = 500 mA, V_GS = 10 V
I_D = 100 mA, V_GS = 5 V
I_D = 100 mA, V_GS = 4.5 V
V_DS = 25 V, V_GS = 0, f = 1 MHz
V_DD = 30V, I_D = 200 mA,
V_GS = 0 ~ 10V
Min Typ Max Unit
⎯
⎯ ± 10 μA
60
⎯
⎯
V
⎯
⎯
1
μA
1.0
⎯
2.5
V
170 ⎯
⎯
mS
⎯
2.0
3.0
⎯
2.1 3.2
Ω
⎯
2.2
3.3
⎯
17
⎯
pF
⎯
1.4
⎯
pF
⎯
5.8
⎯
pF
⎯
2.4
4.0
ns
⎯
26
40
Switching Time Test Circuit
(a) Test circuit
10V
IN
0
10 μs
V_DD = 30 V
Duty ^<= 1%
V_IN: t_r, t_f < 2 ns
(Z_out = 50 Ω)
Common Source
Ta = 25°C
OUT
R_L
V_DD
(b) V_IN ^{10 V}
90%
0V
(c) V_OUT ^VDD
10%
10%
V_{DS (ON)}
td_(on)
90%
t_r
t_f
td_(off)
Precaution
V_th can be expressed as voltage between gate and source when low operating current value is I_D =250 μA for this
product. For normal switching operation, V_{GS (on)} requires higher voltage than V_th and V_{GS (off)} requires lower voltage
than V_th. (Relationship can be established as follows: V_{GS (off)} < V_th < V_{GS (on)} )
Please take this into consideration for using the device.
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