PMV45EN Datasheet, PDF (1/3 Pages) NXP Semiconductors – mTrenchMOSTM enhanced logic level FET

PMV45EN
N-channel TrenchMOS logic level FET
Rev. 2 — 7 November 2011
Product specification
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product is designed and qualified for use in
computing, communications, consumer and industrial applications.
1.2 Features and benefits
 Logic-level compatible
 Very fast switching
 Trench MOSFET technology
1.3 Applications
 Battery management
 High-speed switching
1.4 Quick reference data
Table 1.
Symbol
V_DS
I_D
Quick reference data
Parameter
drain-source voltage
drain current
V_GS
gate-source voltage
Static characteristics
R_DSon
drain-source on-state
resistance
Conditions
T_j ≥ 25 °C; T_j ≤ 150 °C
T_sp = 25 °C; V_GS = 10 V; see Figure 1;
see Figure 3
V_GS = 10 V; I_D = 2 A; T_j = 25 °C; see
Figure 9; see Figure 10
2. Pinning information
Min Typ Max Unit
-
-
30 V
-
-
5.4 A
-20 -
20 V
-
35
42
mΩ
Table 2.
Pin
1
2
3
Pinning information
Symbol Description
G
gate
S
source
D
drain
Simplified outline
3
1
2
SOT23 (TO-236AB)
Graphic symbol
D
G
mbb076 S
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