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PDTA124EE Datasheet, PDF (1/2 Pages) NXP Semiconductors – PNP resistor-equipped transistor
FEATURES
• Built-in bias resistors R1 and R2
(typ. 22 kΩ each)
• Simplification of circuit design
• Reduces number of components
and board space.
APPLICATIONS
• Especially suitable for space
reduction in interface and driver
circuits
• Inverter circuit configurations
without use of external resistors.
DESCRIPTION
PNP resistor-equipped transistor in
an SC-75 plastic package.
NPN complement: PDTC124EE.
PINNING
PIN
DESCRIPTION
1
base/input
2
emitter/ground (+)
3
collector/output
QUICK REFERENCE DATA
SYMBOL
PARAMETER
VCEO
IO
ICM
Ptot
hFE
R1
collector-emitter voltage
output current (DC)
peak collector current
total power dissipation
DC current gain
input resistor
RR-----21--
resistor ratio
Product specification
PDTA124EE
handbook, halfpage 3
1
2
Top view
3
R1
1
R2
2
MAM345
Fig.1 Simplified outline (SC-75) and symbol.
1
3
2
MGA893 - 1
Fig.2 Equivalent inverter
symbol.
MARKING
TYPE
NUMBER
PDTA124EE
MARKING
CODE
05
CONDITIONS
open base
Tamb ≤ 25 °C
IC = −5 mA; VCE = −5 V
MIN.
−
−
−
−
60
15.4
TYP.
−
−
−
−
−
22
MAX.
−50
−100
−100
150
−
28.6
UNIT
V
mA
mA
mW
kΩ
0.8
1
1.2
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