FDV301N Datasheet, PDF (1/2 Pages) Fairchild Semiconductor – Digital FET , N-Channel

SMD Type
Product specification
FDV301N
General Description
This N-Channel logic level enhancement mode field effect
transistor is produced using Fairchild's proprietary, high cell
density, DMOS technology. This very high density process is
especially tailored to minimize on-state resistance. This
device has been designed especially for low voltage
applications as a replacement for digital transistors. Since
bias resistors are not required, this one N-channel FET can
replace several different digital transistors, with different bias
resistor values.
Features
25 V, 0.22 A continuous, 0.5 A Peak.
R_DS(ON) = 5 Ω @ V_GS= 2.7 V
R_DS(ON) = 4 Ω @ V_GS= 4.5 V.
Very low level gate drive requirements allowing direct
operation in 3V circuits. V_GS(th) < 1.5V.
Gate-Source Zener for ESD ruggedness.
>6kV Human Body Model
Replace multiple NPN digital transistors with one DMOS
FET.
SOT-23
Mark:301
SuperSOT^TM-6
SuperSOT^TM-8
SO-8
D
G
S
SOT-223
SOIC-16
INVERTER APPLICATION
Vcc
D
OUT
IN
G
S
GND
Absolute Maximum Ratings T_A = 25^oC unless other wise noted
Symbol Parameter
V_DSS, V_CC Drain-Source Voltage, Power Supply Voltage
V_GSS, V_I Gate-Source Voltage, V_IN
I_D, I_O
Drain/Output Current - Continuous
P_D
T_J,T_STG
ESD
Maximum Power Dissipation
Operating and Storage Temperature Range
Electrostatic Discharge Rating MIL-STD-883D
Human Body Model (100pf / 1500 Ohm)
THERMAL CHARACTERISTICS
R_θJA
Thermal Resistance, Junction-to-Ambient
FDV301N
25
8
0.22
0.5
0.35
-55 to 150
6.0
357
Units
V
V
A
W
°C
kV
°C/W
http://www.twtysemi.com
4008-318-123
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