TS3405 Datasheet, PDF (8/10 Pages) Taiwan Semiconductor Company, Ltd – Single Synchronous Buck PWM Controller

Application Guidelines (continued)
Output Inductor
The output inductor is selected to meet the output
voltage ripple requirements and minimize the converter’s
response time to the load transient. The inductor value
determines the converter’s ripple current and the ripple
voltage is a function of the ripple current. The ripple
voltage and current are approximated by the following
equations:
∆I = (Vin - Vout) / F_S x L x (Vout / Vin)
∆Vout = ∆I x ESR
Increasing the value of inductance reduces the ripple
current and voltage. However, the large inductance
values reduce the converter’s response time to a load
transient. One of the parameters limiting the converter’s
response to a load transient is the time required to
change the inductor current. Given a sufficiently fast
control loop design, the TS3405 will provide either 0% or
100% duty cycle in response to a load transient. The
response time is the time required to slew the inductor
current from an initial current value to the transient
current level. During this interval the difference between
the inductor current and the transient current level must
be supplied by the output capacitor to minimizing the
response time can minimize the output capacitance
required.
The response time to a transient is different for the
application of load and the removal of load. The following
equations give the approximate response time interval for
application and removal of a transient load:
t_RISE = (L x I_TRAN) / (Vin - Vout)
t_FALL = (L x I_TRAN) / Vout
where:
I_TRAN is the transient load current step
t_RISE is the response time to the application of load
t_FALL is the response time to the removal of load
the worst case response time can be either at the
equations at the minimum and maximum output levels for
the worst case response time.
Feedback Compensation
Fig. 6 highlights the voltage-mode control loop for a
synchronous-rectified buck converter. The output voltage
(Vout) is regulated to the reference voltage level. The
error amplifier (Error Amp) output (VE/A) is compared
with the oscillator (OSC) triangular wave to provide a
pulse-width modulated (PWM) wave with a amplitude of
Vin at the Phase node. The PWM wave is smoothed by
the output filter (Lo and Co).
The modulator transfer function is the small-signal
transfer function of Vout / V_E/A. This function is dominated
by a DC Gain and the output filter (Lo and Co), with a
double pole break frequency at F_LC and a zero at F_ESR.
The DC Gain of the modulator is simply the imput voltage
(Vin) divided by the peak-to-peak oscillator voltage V_OSC.
Modulator Break Frequency Equations
F_LC = 1 / 2π x √ Lo x Co
F_ESR = 1 / 2π x ESR x Co
Compensation Break Frequency Equations
F_Z = 1 / 2π x R₂ x C₁
F_P1 = 1 / 2π x R₂ x [(C₁ x C₂) / (C₁ + C₂)]
F_Z1 = 1 / 2π x (R₁ + R₃) x C₃
F_P2 = 1 / 2π x R₃ x C₃
The compensation network consists of the error amplifier
(internal to the TS3405) and the impedance networks
ZIN and ZFB. The goal of the compensation network is
to provide a closed loop transfer function with the
highest 0dB crossing frequency (f0dB) and adequate
phase margin. Phase margin is the difference between
the closed loop phase at f0dB and 180 degrees.
Vin
Driver
O^OS^CC
PWM
_
+
Driver
Phase
Lout Vout
Co
ESR
ZFD
VE/A
_
ZIN
+ Reference
Error AMP
DETAILED COMPENSATION COMPONENT
C2
C1 _R2
ZFD
Vout
C3 _R3
COMP
R1
_
FB
ZIN
TS3405 ⁺
Reference
FIGURE 6 Voltage-mode buck converter
compensation design.
TS3405
8-10
2003/12 rev. A