TS1900 Datasheet, PDF (3/5 Pages) Taiwan Semiconductor Company, Ltd – Ultra Low Quiescent Current Smart Load Switch

TS1900
Ultra Low Quiescent Current Smart Load Switch
Application Information
The TS1900 featured very low quiescent current and very low RDS(ON) and making them ideal for battery-powered
applications. The ENABLE control pin is TTL compatible and driven by 1.5V beyond making the TS1900 an ideal level-
shifting load switch.
Input Capacitor Selection
A 1UF or larger input capacitor is recommended to prevent load transients from affecting upstream circuits. C_IN should
be located as close to the device V_IN pin as practically. There is no specific requirement type of capacitor is
recommended. However, for higher current operation, ceramic capacitors are recommended for C_IN.
L=[V_OUT X (V_IN-V_OUT)] / [V_IN X (ΔI_L X(F_OSC]
Where ΔI_L is the inductor ripple current. Larger inductance is recommended for better efficiency in light load condition.
Output Capacitor Selection
For proper slew operation, a 0.1uF or greater is recommended. The output capacitor has also no specific capacitor
type requirement. If desired, C_OUT maybe increased without limit to accommodate any load transient
Reverse Output-to-Input Voltage Conditions and Protection
Under normal conditions, there is a parasitic diode between the output & input of the load switch. In case of V_OUT
exceeding V_IN, this would forward bias the internal parasitic diode and allow excessive current flow into the V_OUT pin
and possibly damage the load switch.
In applications, where there is a possibility of V_OUT exceeding V_IN for brief periods of time during operation, the use of
larger value C_IN capacitor is highly recommended. A larger value of C_IN with respect to C_OUT will affect a slower C_IN
decay rate during shutdown, thus preventing V_OUT from exceeding V_IN.
In case of extended period of time for V_OUT exceeding V_IN, it is recommended to place a Schottky diode from V_IN to
V_OUT.
Thermal Considerations
The TS1900 is designed to deliver a continuous load current. The maximum limit is package power dissipation. At
any given ambient temperature, the maximum package power dissipation can be determined by the following
equation:
P_D(MAX) = [T_J(MAX) - T_A] / θ_JA
Constraints for the TS1900 are maximum T_J(MAX) = 125°C, and package thermal resistance, θ_JA = 120°C /W. The
maximum continuous output current for TS1900 depends on package power dissipation and the R_DS(ON) of MOSFET at
T_J(MAX). Typical conditions are calculated under normal ambient condition where
T_A = 25°C At 85°C, P_D(MAX) = 333mW. At T_A = 25 , P_D(MAX) = 833mW.
The maximum current is calculated by the following equation:
I_OUT < (P_D(MAX) / R_DS(MAX))<(1/2)
For example, if V_IN = 5V, R_DS(MAX) = 160mΩ and T_A = 25Ċ, I_OUT(MAX) = 2.2A.
Thermal Shutdown is employed to protect the device damage when over temperature 160°C.
PCB Layout Consideration
To maximize TS1900 performance, some board layout rules should be followed:
V_IN and V_OUT should be routed using wider than normal traces, and GND should be connected to a ground plane. For
best performance, C_IN and C_OUT should be placed close to the package pins.
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Version: A07