CY7B923_11 Datasheet, PDF (1/40 Pages) Cypress Semiconductor – HOTLink® Transmitter/Receiver

CY7B923, CY7B933
HOTLink^® Transmitter/Receiver
Features
■ Fibre Channel-compliant
■ IBM ESCON^®-compliant
■ DVB-ASI-compliant
■ ATM-compliant
■ 8B/10B-coded or 10-bit unencoded
■ Standard HOTLink^®: 160 to 330 Mbps
■ High-speed HOTLink: 160 to 400 Mbps for high-speed
applications
■ Transistor-transistor logic (TTL)-synchronous I/O
■ No external phase locked-loop (PLL) components
■ Triple positive emitter coupled logic (PECL) 100 K serial
outputs
■ Dual PECL 100 K serial inputs
■ Low-power: 350 mW (Tx), 650 mW (Rx)
■ Compatible with fiber-optic modules, coaxial cable, and twisted
pair media
■ Built-in self-test (BIST)
■ Single +5-V supply
■ 28-pin small outline integrated circuit (SOIC)/plastic leaded
chip carrier (PLCC)
■ Pb-free packages available
■ 0.8-μ bipolar complementary metal oxide semiconductor
(BiCMOS)
CY7B923 Transmitter Block Diagram
Functional Description
The CY7B923 HOTLink^‚ transmitter and CY7B933 HOTLink
receiver are point-to-point communications building blocks that
transfer data over high-speed serial links (fiber, coax, and twisted
pair). Standard HOTLink data rates range from 160 to 330 Mbps.
Higher speed HOTLink is also available for high-speed applica-
tions (160 to 400 Mbits/second). Figure 1 illustrates typical
connections to host systems or controllers.
Eight bits of user data or protocol information are loaded into the
HOTLink transmitter and are encoded. Serial data is shifted out
of the three differential PECL serial ports at the bit rate (which is
ten times the byte rate).
The HOTLink receiver accepts the serial bit stream at its differ-
ential line receiver inputs and, using a completely integrated PLL
clock synchronizer, recovers the timing information necessary
for data reconstruction. The bit stream is deserialized, decoded,
and checked for transmission errors. Recovered bytes are
presented in parallel to the receiving host along with a byte-rate
clock.
The 8B/10B encoder/decoder can be disabled in systems that
already encode or scramble the transmitted data. I/O signals are
available to create a seamless interface with both asynchronous
FIFOs (that is, CY7C42X) and clocked FIFOs (that is,
CY7C44X). A BIST pattern generator and checker allows testing
of the transmitter, receiver, and the connecting link as a part of a
system diagnostic check.
HOTLink devices are ideal for a variety of applications where a
parallel interface can be replaced with a high-speed
point-to-point serial link. Applications include interconnecting
workstations, servers, mass storage, and video transmission
equipment.
Cypress Semiconductor Corporation • 198 Champion Court
Document #: 38-02017 Rev. *I
• San Jose, CA 95134-1709 • 408-943-2600
Revised October 11, 2011