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TQ3131 Datasheet, PDF (6/16 Pages) TriQuint Semiconductor – 3V Cellular Band CDMA/AMPS LNA IC
TQ3131
Data Sheet
TQ3131 Product Description
The TQ3131 LNA uses a cascode low noise amplifier, along
with signal path switching. A bias control circuit sets the
quiescent current for each mode and ensures peak performance
over process and temperature, (refer to Figure 1). In the
application, CMOS level signals are applied to pins 1 and 5 and
are decoded by internal logic in order to set the device to the
desired mode. (see Table 1 for logic control states)
In the high gain mode, switches S1, S2, and S5 are closed, with
switches S3 and S4 open. In the bypass mode, switches S1,
S2, and S5 are open, with switches S3 and S4 closed. Having
five switches ensures that there are no parasitic feedback paths
for the signal. In the AMPS mode, control logic switches the
LNA into a low current bias condition.
Only three external components are needed in an application.
The chip uses an external cap and inductor for the input match
to pin 3. The output is internally matched to 50 ohms at pin 6.
A Vdd bypass cap is required close to pin 8.
External degeneration of the cascode is required between pin 4
and ground. However, a small amount of pc board trace can be
used as the inductor (Lbrd). Alternatively, if an extra component
can be tolerated, a small value chip inductor can be used. (see
Figure 2)
VDD
C2
1
C2
Bias and Switch Control Logic
2
GND
LNA IN
L1
3
RFIN
C1
Lbrd
4
LNA
GND
S6
S1
S3
S5
S2
S4
R1
VDD
8
C2
7
GND
6
RF
OUT
5
C3
LNA OUT
C3
Figure 1 TQ3131 Simplified Schematic
Operation
MODE
High Gain
AMPS
Bypass
C2
C3
0
0
1
0
0
1
1
1
Typical Gain
13(dB)
11(dB)
-2(dB)
Table 1 LNA States and Control Bits
LNA Input Network Design
Input network design for most LNA’s is a straightforward
compromise between noise figure and gain. The TQ3131 is no
exception, even though it has 3 different modes. The device
was designed so that one only needs to optimize the input
match in the high gain mode. As long as the proper grounding
and source inductance are used, the other two modes will
perform well with the same match.
It is probably wise to synthesize the matching network
component values for some intermediate range of Gamma
values, and then by experimentation, find the one which
provides the best compromise between noise figure and gain.
The quality of the chip ground will have some effect on the
match, which is why some experimentation will likely be needed.
The input match will affect the output match to some degree, so
S22 should be monitored.
The values used on our evaluation board may be used as a
starting point.
Noise Parameter Analysis
A noise parameter analysis is shown on the next page for both
the high gain and AMPS modes. A “nominal” device was
mounted directly on a solid copper ground plane with semi-rigid
probes attached to the device input and output pins. A value of
Lbrd was chosen so that 13.0dB of gain was attained at
conjugate match. Then the tuner was removed and noise data
was taken. Please note that although data was taken at
700MHz and 1000MHz, the device was designed to operate
satisfactorily only over a much more limited range.
6
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