TQ9303 Datasheet, PDF (1/25 Pages) TriQuint Semiconductor – Fibre Channel Encoder/Decoder

TRIQUINT
S E M I C O N D U C T O R, I N C .
Figure 1. TQ9303 Block Diagram
TQ9303
Data
32
Parity
4
Control
11
HOST
Data
32
Parity
4
Control
12
Data
10
TQ9501
Control
or
2
2 ^GA9101
Tx
Optical Tx
or
Copper
Interface
TQ9303
ENDEC
2
TQ9502
Optical Rx
Data
or
or
10 _GA9102
Copper
Control
Rx
2
Interface
2
The TQ9303 ENDEC (ENcoder/DECoder) implements 8b/10b encoding
and decoding, ordered set encoding and decoding, and parity checking
and generation as defined in the Fibre Channel Physical Signaling
Interface Standard (FC-PH). The ENDEC fully implements the FC-1 layer
of the Fibre Channel Standard. Implemented in a 0.8-micron CMOS
process, the ENDEC also performs 32-bit CRC checking and generation
as defined in the FC-2 layer of the Fibre Channel specification.
The TQ9303 ENDEC interfaces directly to TriQuint’s FC-0 layer Fibre Channel
Transmitter (Tx) and Receiver (Rx) chipsets at the speeds shown below:
FC Rate
FC-266
FC-531
FC-1063
Transmitter
GA9101
TQ9501
TQ9501
Receiver
GA9102
TQ9502
TQ9502
Data Rate (Mbaud)
194–266
500–625
1000–1250
Triquint’s Transmitter and Receiver devices are designed with TriQuint’s
proprietary 0.7-micron GaAs process. The Tx and Rx interface directly to
copper-based electrical media or to a fiber-optic module. The Transmitter
performs parallel-to-serial conversion on the encoded data and generates
the internal high-speed clock for the serial output data stream. The Receiver
recovers the clock and data from the input serial stream, performs serial-
to-parallel conversion, and detects and aligns on the K28.5 character.
Fibre Channel
Encoder/Decoder
Features
• Compliant with ANSI X3T11
Fibre Channel Standard
• Full implementation of
Fibre Channel’s FC-1 layer
• Interfaces directly with
TriQuint’s GA9101/GA9102
and TQ9501/TQ9502 FC-0
Fibre Channel chipsets
• Suitable for proprietary serial
links (virtual ribbon cable)
• Implements 8b/10b encoding
and decoding
• Implements ordered set
encoding and decoding
• Checks and generates 32-bit
CRC and parity
• 10-bit TTL-compatible interface
to Transmitter and Receiver
• 32-bit interface to the host
• Fully synchronous operation
• 160-pin PQFP
For additional information and latest specifications, see our website: www.triquint.com
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